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MT9123AP

Dual Voice Echo Canceller

Mitel Networks 

Preliminary Information

MT9123

Echo Canceller A, Rin Peak Detect Register 2

Echo Canceller B, Rin Peak Detect Register 2

RP

RP15 RP14

RP13

RP12

RP11 RP10

RP9

RP8

7

6

5

4

3

2

1

0

ADDRESS = 0Dh READ

ADDRESS = 2Dh READ

Power Reset Value

N/A

Echo Canceller A, Rin Peak Detect Register 1

Echo Canceller B, Rin Peak Detect Register 1

ADDRESS = 0Ch READ

ADDRESS = 2Ch READ

RP

RP7

RP6

RP5

RP4

RP3

RP2

RP1

RP0

Power Reset Value

N/A

7

6

5

4

3

2

1

0

These peak detector registers allow the user to monitor the receive in signal (Rin) peak signal level. The information is in 16-bit 2’s

complement linear coded format presented in two 8 bit registers for each echo canceller. The high byte is in Register 2 and the low

byte is in Register 1.

Echo Canceller A, Sin Peak Detect Register 2

Echo Canceller B, Sin Peak Detect Register 2

SP

SP15

SP14

SP13

SP12

SP11 SP10

SP9

SP8

7

6

5

4

3

2

1

0

ADDRESS = 0Fh READ

ADDRESS = 2Fh READ

Power Reset Value

N/A

Echo Canceller A, Sin Peak Detect Register 1

Echo Canceller B, Sin Peak Detect Register 1

ADDRESS = 0Eh READ

ADDRESS = 2Eh READ

SP

SP7

SP6

SP5

SP4

SP3

SP2

SP1

SP0

Power Reset Value

N/A

7

6

5

4

3

2

1

0

These peak detector registers allow the user to monitor the send in signal (Sin) peak signal level. The information is in 16-bit 2’s

complement linear coded format presented in two 8 bit registers for each echo canceller. The high byte is in Register 2 and the low

byte is in Register 1.

Echo Canceller A, Error Peak Detect Register 2

Echo Canceller B, Error Peak Detect Register 2

EP

EP15

EP14

EP13

EP12

EP11 EP10

EP9

EP8

7

6

5

4

3

2

1

0

ADDRESS = 11h READ

ADDRESS = 31h READ

Power Reset Value

N/A

Echo Canceller A, Error Peak Detect Register 1

Echo Canceller B, Error Peak Detect Register 1

ADDRESS = 10h READ

ADDRESS = 30h READ

EP

EP7

EP6

EP5

EP4

EP3

EP2

EP1

EP0

Power Reset Value

N/A

7

6

5

4

3

2

1

0

These peak detector registers allow the user to monitor the error signal peak level. The information is in 16-bit 2’s complement

linear coded format presented in two 8 bit registers for each echo canceller. The high byte is in Register 2 and the low byte is in

Register 1.

8-63

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