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PCD6003

Digital telephone answering machine chip

Philips Electronics 

Philips Semiconductors

Digital telephone answering machine chip

Product specification

PCD6003

Table 6 shows the input clock selection in the analog

section of the chip. Note that for 3.456 and 3.58 MHz

crystal input clock, no clock division is done prior to

inputting it to the PLL. After reset the input clock division

rate is by default 1. This means that applications using an

input clock frequency other than 3.456 or 3.580 MHz, will

have to set the proper division rate, after system start-up.

Otherwise proper functionality of the analog blocks is not

guaranteed.

Table 7 shows the microcontroller clock frequencies.

In Emergency mode (bit 7 of CKCON reset), the

EMG_CLK is input directly to the microcontroller. The

values of CKCON bits 2 and 3 are then irrelevant. Note

that Emergency mode operation is only designed for

start-up and POTS mode condition. Peripheral blocks

(such as the CODECs and the IOM block) are not

guaranteed to work when CKCON bit 7 is reset.

Table 6 Input clock selection

CKCON.6

(RTC MODE)

0

1

0

0

SYMOD.7

(input clock 1)

0

0

0

1

SYMOD.6

(input clock 0)

0

0

1

0

INPUT CLOCK

DIVISION RATIO

1

1

2

4

CHIP INPUT CLOCK

FREQUENCY (MHz)

3.456

3.580(1)

6.912

13.824

Note

1. The PCD6003 timing system is based on the 3.456 MHz (or multiples) input clock frequency. In order to be able to

use the low cost 3.58 MHz crystal or ceramic resonator, a clock frequency correction is needed for some blocks

(RTC, CODEC and IOM). IOM will only operate in Master mode.

Table 7 Microcontroller clock selection

CKCON.7

(EMG mode)

0

1

1

1

1

1

CKCON.3

(micro clock 1)

X

X

0

0

1

1

CKCON.2

(micro clock 0)

X

X

0

1

0

1

SYMOD.5

PLL on/off

X

0

1

1

1

1

MICROCONTROLLER

CLOCK FREQUENCY(1)

EMG_CLK

do not use(2)

CLK_1

CLK_7

CLK_14

CLK_21

Notes

1. 6 clocks/cycle.

2. If the PLL is switched off when not in Emergency mode, the selected clock would not be available. The micro would

hang up. Before CKCON.7 is set to logic 1, SYMOD.5 must be set to logic 1 to activate the PLL.

2001 Apr 17

17

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