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PCF8573 Ver la hoja de datos (PDF) - Philips Electronics

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PCF8573
Philips
Philips Electronics Philips
PCF8573 Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Philips Semiconductors
Clock/calendar with serial I/O
Product specification
PCF8573
8 CHARACTERISTICS OF THE I2C-BUS
The I2C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line
(SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when
connected to the output stages of a device. Data transfer may be initiated only when the bus is not busy.
8.1 Bit transfer
See Fig.4. One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the
HIGH period of the clock pulse as changes in the data line at this time will be interpreted as control signals.
handbook, full pagewidth
SDA
SCL
data line
stable;
data valid
change
of data
allowed
MBC621
Fig.4 Bit transfer.
8.2 Start and stop conditions
Refer to Fig.5. Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data
line, while the clock is HIGH is defined as the start condition (S). A LOW-to-HIGH transition of the data line while the
clock is HIGH is defined as the stop condition (P).
handbook, full pagewidth
SDA
SDA
SCL
S
START condition
SCL
P
STOP condition
MBC622
Fig.5 Definition of start and stop conditions.
2003 Jan 27
7

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