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STV9432TAP Ver la hoja de datos (PDF) - STMicroelectronics

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STV9432TAP Datasheet PDF : 25 Pages
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STV9432TAP
V1 Register: V sync to Active video, min. of K to A
400C
V1.7
V1.6
V1.5
V1.4
400D
-
-
-
-
V2 Register: Active video to V sync, min. of B to K’
400E
V2.7
V2.6
V2.5
400F
-
-
-
V3 Register: Number of lines per frame, K to K’
V2.4
-
4010
4011
V3.7
-
V3.6
-
V3.5
-
V3.4
-
V1.3
V1.11
V2.3
V2.11
V3.3
V3.11
V1.2
V1.10
V2.2
V2.10
V3.2
V3.10
V1.1
V1.9
V2.1
V2.9
V3.1
V3.9
V1.0
V1.8
V2.0
V2.8
V3.0
V3.8
8.3 - TIMING ANALYSIS TRIGGER
The Timing Analysis is performed according to the setting of SBN and TIMG registers:
8.3.1 - SBN Register
This 8 bits register holds the ”sampling bloc” number.
The sampling bloc is a set of 4 consecutive scan lines, the first of which is used for sampling the video timings or
Beam currents.
The reset value of this register is 0.
4015
SBN7
SBN6
SBN5
SBN4
SBN3
SBN2
SBN1
SBN0
8.3.2 - TIMG Register
4016
STM
NFR1
NFR0 ADCDLY3 ADCDLY2 ADCDLY1 ADCDLY0 SELECT
This 8 bits register holds the following parameters:
STM
: Start Measurement Bit. This bit has to be forced to 1 by I2C to start the measure-
ment sequence, depending on the measurement selection bit. When measure-
ment is completed the IC will reset this bit to 0.
NFR [1:0]
: NFR number of measurement frames, 1 to 4 frames
ADCDLY[3:0]
SELECT
: Cut-off Beam current ADC sampling delay time: 0 to 15 x tOSC, by tOSC steps
: Selection of Beam current measurement (0) or Timing measurement (1)
To initiate a Timing Analysis cycle:
- program the Sampling Bloc Number in the SBN Register,
- program the TIMG Register, with: ”SELECT” bit =1, ”NFR” bits specify the number of measurement frames
(H1, H2, V1, V2), ”STM” bit = 1 (Start Measurement).
As soon as the measurement cycle is finished, the ”STM” bit is automatically reset by the device.
After a Timing Analysis cycle, reading a zero in STM bit of TIMG register means that the measurement is com-
pleted and the mcu may read the results in Hi and Vi registers.
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