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PMB2349

Wireless Components Optimized RF/IF Dual PLL Frequency Synthesizer

Infineon Technologies 

Confidential

3.3 Functional Block Diagram

PMB 2349

preliminary

Functional Description

PLL1 (RF)

VCC1

VPD1

PD1

Phase

Detector

Mod1

Modulus Control

14 Bit

N-Counter

Data Reg.

Shadow Reg.

Shift Register

6 Bit

A-Counter

Data Reg.

Shadow Reg.

Shift Register

Phase

Detector

VCC2

VPD2

PD2

GND1

Mod1

RF

RFX

GND2

EN

Serial

DA

Control

Logic

CLK

PLL2 (IF)

14 Bit

R1-Counter

Data Reg.

Shadow Reg.

Shift Register

14 Bit

R1-Counter

Data Reg.

Shift Register

Mod2

Modulus Control

14 Bit

N-Counter

Multiplexer

Data Reg. 1

Data Reg. 2

4 Bit

A-Counter

Multiplexer

Data Reg. 1

Data Reg. 2

Shift Register

Shift Register

GND1

IF

IFX

GND2

RI

Bias

Iref

REXT

LD

LD

fo

Figure 3-2 Functional Block Diagram

Funct_block.wmf

Wireless Components

3-7

Specification, May 2000

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