datasheetbank_Logo
búsqueda de Hoja de datos y gratuito Fichas de descarga

RT9259 Ver la hoja de datos (PDF) - Richtek Technology

Número de pieza
componentes Descripción
Lista de partido
RT9259 Datasheet PDF : 15 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
RT9259
If MOSFET with RDS(ON) = 16mΩ is used, the OCP
threshold current is about 25A. Once OCP is triggered,
the RT9259 enters hiccup mode and re-soft starts again.
The RT9259 shuts down after 4 time OCP hiccups.
Inductor Current
(20A/Div)
Time (2.5ms/Div)
Figure 6. Shorted then Start Up
IL
(20A/Div)
A well-designed compensator regulates the output voltage
to the reference voltage VREF with fast transient response
and good stability.
In order to achieve fast transient response and accurate
output regulation, an adequate compensator design is
necessary. The goal of the compensation network is to
provide adequate phase margin (greater than 45 degrees)
and the highest 0dB crossing frequency. It is also
recommended to manipulate loop frequency response that
its gain crosses over 0dB at a slope of 20dB/dec.
OSC
PWM
Comparator
-
ΔVOSC
+
VIN
Driver
Driver
L
PHASE
COUT
VOUT
ZFB
COMP
-
EA+
ZIN
REF
ESR
LGATE
(5V/Div)
UGATE
(5V/Div)
Time (5μs/Div)
Figure 7. Shorted then Start Up (Extended Figure 3)
Feedback Compensation
The RT9259 is a voltage mode controller. The control loop
is a single voltage feedback path including a compensator
and modulator as shown Figure 8. The modulator consists
of the PWM comparator and power stage. The PWM
comparator compares error amplifier EA output (COMP)
with oscillator (OSC) sawtooth wave to provide a pulse-
width modulated (PWM) with an amplitude of VIN at the
PHASE node. The PWM wave is smoothed by the output
filter LOUT and COUT. The output voltage (VOUT) is sensed
and fed to the inverting input of the error amplifier.
C2
ZFB
C1 R2 C3
ZIN VOUT
R3
COMP
R1
-
FB
EA+
REF
Figure 8. Closed Loop
1) Modulator Frequency Equations
The modulator transfer function is the small-signal transfer
function of VOUT/VCOMP (output voltage over the error
amplifier output. This transfer function is dominated by a
DC gain, a double pole, and a zero as shown in Figure 10.
The DC gain of the modulator is the input voltage (VIN)
divided by the peak to peak oscillator voltage VOSC. The
output LC filter introduces a double pole, 40dB/decade
gain slope above its corner resonant frequency, and a total
phase lag of 180 degrees. The resonant frequency of the
LC filter expressed as :
fLC =
1
2π LOUT × COUT
www.richtek.com
10
DS9259-03T00 August 2007

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]