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RTL8019AS

Realtek Full-Duplex Ethernet Controller with Plug and Play Function (RealPNP)

Realtek Semiconductor 

SPECIFICATION

RTL8019AS

s set PAR0-5 to accept packet

s set TCR=04h (CRC enabled)

s set DCR=40h (8-bit slot) or 43h (16-bit slot)

s clear ISR

s tx a packet

s check CRC bytes in FIFO after loopback

B. To test CRC checker

s set RCR=00h to accept physical packet

s set PAR0-5 to accept packet

s set TCR=05h (CRC disabled)

s set DCR=40h (8-bit slot) or 43h (16-bit slot)

s clear ISR

s tx a packet with good or bad CRC appended by program

s check FIFO, ISR & RSR after loopback

For bad CRC, expected: ISR=06h, RSR=02h (Tx: OK, Rx:CRC error)

For good CRC, expected: ISR=02h, RSR=01h (Tx:OK, Rx: OK)

Note: In loopback mode, the received packets are not stored to SRAM, so PRX bit in ISR isn't set.

(3) To verify the address recognition function

q Select a loopback mode (e.g. mode 2) to test

A. Right physical destination address

s set RCR=00h to accept physical packet

s set PAR0-5 to accept packet

s set TCR=04h (CRC enabled)

s set DCR=40h (8-bit slot) or 43h (16-bit slot)

s clear ISR

s tx a packet

s check ISR after loopback

Expected: ISR=06h (packets accepted, Rx CRC error)

B. Wrong physical destination address

s set RCR=00h to accept physical packet

s set PAR0-5 to reject packet

s set TCR=04h (CRC enabled)

s set DCR=40h (8-bit slot) or 43h (16-bit slot)

s clear ISR

s tx a packet

s check ISR after loopback

Expected: ISR=02h (packets rejected, Rx no response)

8019AS.doc

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2001-04-02

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