SAA7112 Ver la hoja de datos (PDF) - Philips Electronics

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SAA7112

Decoder with High-Performance Scaler (HPS) for Image Port (PELICAN)

Philips Electronics 

Philips Semiconductors

Decoder with High-Performance Scaler

(HPS) for Image Port (PELICAN)

BLOCK DIAGRAMS

Preliminary specification

SAA7112

handbook, full pagewidth

LLC2

RTS0

LLC

RTCA

RTS1

RT OUT

RESIN

RESON

CE

XOUT

XTALI

XTAL

AI11

AI12

AI21

AI22

AI23

AI24

AOUT

CLOCK

GENERATION

AND

POWER ON

CONTROL

ANALOG

DUAL

ADC

SAA7111A

BASED

DIGITAL

DECODER

XCLK

XRH

XREC

XDQ

XRV

XTRI

XPD7

to

XPD0

EXPANSION PORT PIN MAPPING

D1 OUT

D1 IN

chroma of 16-bit mode

from host port

a

X PORT INPUT FORMATTER (SELECT)

4:2:2

OUTPUT

INTERFACE

data, clock, H, V,

FID and qualifier

to scaler

b

AUDIO

Vref

AMCLK

MASTER

CLOCK

GENERATION

Vref

ALRCLK

ASCLK

AXMCLK

AUDIO

BIT BLOCK

WORD SELECT

GENERATION

data, clock, H, V,

FID and qualifier

to text slicer

c

MGE859

1996 Jun 20

Fig.1 Block diagram (continued in Fig.2).

4

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