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CD128410QCE

IEEE 1284-Compatible Parallel Interface Controller with Two High-Speed Asynchronous Serial Ports

Intel 

IEEE 1284-Compatible Parallel Interface Controller — CD1284

Tables

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Pin Descriptions ..................................................................................................20

Global Registers..................................................................................................24

Virtual Registers — Serial ...................................................................................24

Virtual Registers — Serial and Parallel ...............................................................24

Channel Registers — Serial ................................................................................25

Channel Registers — Parallel Pipeline

(Selected by Channel 0 in CAR) .........................................................................26

Channel Registers — Parallel Port

(Selected by Channel 0 in CAR) .........................................................................26

Global Registers..................................................................................................27

Virtual Registers ..................................................................................................27

Virtual Registers — Serial and Parallel ...............................................................28

Channel Registers — Serial ................................................................................28

Channel Registers — Parallel Pipeline

(Selected by Channel 0 in CAR) .........................................................................29

Channel Registers — Parallel Port

(Selected by Channel 0 in CAR) .........................................................................29

Request-Type Bit Assignments ...........................................................................38

CCSR[6:5] Encoding ...........................................................................................56

CCSR[2:1] Encoding ...........................................................................................57

COR Control Bits.................................................................................................58

Out-of-Band Pin Connections..............................................................................59

Modem Control Pin Functions .............................................................................60

Signal Names ......................................................................................................77

System Clock Settings ........................................................................................83

Baud Rate Constants — CLK = 25 MHz ...........................................................103

Baud Rate Constants — CLK = 20.2752 MHz ..................................................104

Baud Rate Constants — CLK = 20.00 MHz ......................................................104

Baud Rate Constants — CLK = 18.432 MHz ....................................................105

Baud Rate Constants — CLK = 16 MHz ...........................................................105

Asynchronous Timing Reference Parameters...................................................157

Synchronous Timing Reference Parameters ....................................................164

Datasheet

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