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XE5224DM

Blackjack Tele-Controller

Xecom 

Tele-Controller Memory Configuration

Table 1

Development Mode Memory Mapping (CNFG0=0)

CNFG2

0

0

1

1

CNFG1

0

1

0

1

Program Memory

0 - 7FFF

ROM

ROM

ROM

ROM

Data Memory

0 - 7EFF

7F00 - 7FFF

RAM

Peripheral I/Os

RAM

Peripheral I/Os

RAM

Peripheral I/Os

RAM

Peripheral I/Os

Program/Data

8000 - FFFF

Flash Memory, Page 0

Flash memory, Page 1

Flash memory, Page 2

Flash memory, Page 3

Memory Structure:

Xecom based the memory structure of the Tele-

Controller on the 8051 micro-controller. The lower

32 Kbyte memory addresses include separate

program and data storage. Program and data

storage overlap in the upper 32 Kbytes of memory.

The XE5224DM and XE5224FD Tele-Controllers

have 32 Kbytes of ROM, 32 Kbytes of RAM and

128 Kbytes of Flash memory. ROM contains the

code for Tele-Controller operation and software

design tools; RAM provides space for data storage

by the application program; the 128 Kbytes of Flash

memory can store data and/or application programs.

Flash memory is divided into four, 32 Kbyte pages.

Development Mode:

Develoment mode uses the lower 32 Kbytes of

embedded ROM as program memory. ROM

addresses are 0 to 7FFFF. The lower 32 Kbytes of

data memory are dedicated to RAM except for the

small portion reserved for I/O lines. RAM provides

the Data memory for addresses 0 to 7EFF.

Addresses 7F00 to 7FFF serve peripheral I/O lines.

The upper 32 Kbytes of memory, addresses 8000 to

FFFF, access one of the four pages of Flash

memory. The CNFG1 and CNFG2 configuration

lines selects which page of Flash memory is

addressed. Table 1 shows Tele-Controller memory

mapping in development mode.

Memory mapping permits shuffling ROM and Flash

memories within the standard 8051 memory

structure. Reconfiguring the Tele-Controller's

memory creates two modes of operation. In

development mode the code in ROM runs the

system. In application mode the application stored

in Flash memory operates the system.

Application Mode:

In the application mode a page of Flash memory

serves as the lower 32 Kbytes of program memory.

This page of Flash memory is write protected. As

in the development mode, RAM provides the Data

storage in addresses 0 to 7EFF. Addresses 7F00 to

7FFF are provided for peripheral I/O lines.

Memory Mapping:

The Tele-Controller insures maximum flexibility with

a configurable memory mapping scheme. Three

external configuration pins select how the memory is

to be used. These three configuration pins, CNFG0,

CNFG1, and CNFG2, can be controlled by output

pins of the XE5224 or by board-mounted jumpers or

switches.

The upper 32 Kbytes of memory, addresses 8000 to

FFFF, access page 1 or 3 of Flash memory. If the

application program is stored in either of these

pages, the user may choose to write protect this

page of memory as well. CNFG1 and CNFG2

configuration lines select Flash memory pages and

write protection as shown in Table 2 on the following

page.

XE5224DM & XE5224FD

(5)

XECOM

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