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STLC60135

ADSL MODEM CHIP SET

STMicroelectronics 

TOSCA STLC60134/STLC60135

Interleaving is optional and can be used simulta-

neously on a slow channel (e.g., for data or con-

trol info) while a fast channel (e.g., video) oper-

ates without interleaving. ICs include rate

adaptation capabilities during show time.

In transmit direction the chip set allows to select

an attenuation of the signal in case of short loops

or large echo (politeness). In receive direction the

chip set can optionally control an external multi-

plexer to select an external attenuation of the sig-

nal in case of short loops.

TOSCA chip set

TOSCA is a two-chip ADSL modem transceiver.

ST also provides the necessary software for

transceiver’s external controller.

TOSCA can easily be hooked up with ATM sys-

tems through the built-in UTOPIA level 2 inter-

face. That allows ATM traffic to be carried, at up

to 8Mbit/s downstream and 1Mbit/s upstream,

over a very plain and widespread twisted pair.

TOSCA can be used at both ends of the loop

(ATU-C and ATU-R ends).

The modem control software can be compiled as

C++ code, independentlyon the processor used.

The driver can be interfaced to any external real

time operating system.

These pages block diagrams show the main func-

tions built-in in STLC60134 and STLC60135.

TOSCA chip set supports three different rate ad-

aptation modes: fixed rate adaptation mode, fixed

with capability to boost within fixed range, dy-

namic rate adaptationduring show time.

Modem’s performances are set by the following

Figure 2. Analog Front End block diagram.

parameters: Rate adaptation mode, Downstream

and Upstream bit rate for both latency paths,

Noise margins (min, max and target typically at

10E-7 BER without RS, interleaving and trellis),

Maximum power spectral density for downstream,

Maximum power for both up and downstream,

Carrier mask (which tones are disabled), maxi-

mum interleaving delay.

Tones from number 8 to number 255 can be

used: from 8 to 31 for upsteam signals and from

32 to 255 for downstream signals. Numbers 16

and 64 are dedicated to pilot tones which are

employed for synchronisation purposes between

ATU-C and ATU-R ends. The software sets the

use of tones for optimisation of performances.

At ATU-R, time recovery is carried out by the

chip-set through the pilot tones. This activity is

undertaken in two steps in order to achieve no

more than 2ppm between ATU-C and ATU-R.

The transceiver controller software monitors line

and channel. As far as line is concerned noise

margin, attenuation, power, carrier load, relative

capacity occupation are checked. Channel’s

monitoring deals with cell-delineation, actual ATM

(fast and interleaved) up and downstream rates,

achievable ATM DS and US rates (only at ATU-C

side).

TOSCA ICs

TOSCA consists of an Analog Front End

(STLC60134) and a Discrete Multitone Modem

(STLC60135) integrated circuits which are pro-

duced by STMicroelectronics.

Here below we will briefly go through the main

topics of both the ICs.

35.328MHz

TRANSMIT-SIDE

12 bits/8.8MHz

4

MUX

DAC

12 bits/8.8MHz

4

MUX

DAC

RECEIVE-SIDE

12 bits/8.8MHz

4

MUX

ADC

ATU-R

LPF

138KHz

ATU-C

LPF

1.1MHz

ATU-R

LPF

138KHz

ATU-C

LPF

1.1MHz

ATU-R

LPF

1.1MHz

ATU-C

LPF

138KHz

VCODAC

XTAL

DRIVER

AGC

G=15...0dB

STEP 1dB

AGC

G=15...0dB

STEP 1dB

G=0...31dB

STEP 1dB

LNA

D98TL391

2/7

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