1.6 Application Notes
1.6.1 General
On power-up, it will take 80ms to initialise the internal state, this delay should be accounted for
before the DETECT output is valid.
XTAL/CLOCK
1
C2
8
X1
R5
XTALN 2
7
VREF
R3
CMX673P1
R2
ENABLE
3
6
DETECT
4
_
5
SIGIN
+
R1
C3
R4
C4
Figure 3 A typical Telephone Line Circuit Application
R1 470kΩ
R2 470kΩ
R3 240kΩ
R4 470kΩ
R5 160kΩ
C3 0.01µF 250V
C4 0.01µF 250V
Phone
Line
Note: 1. Resistors ±1%, Capacitors ±20% unless otherwise stated.
2. A low offset opamp is needed.
An alternative set of component values can be used:
R1 499kΩ
R2 499kΩ
R3 54.9kΩ
R4 499kΩ
R5 49.9kΩ
C3 0.001µF 300V
C4 0.001µF 300V
Note: 3. Resistors ±1%, Capacitors ±2% unless otherwise stated.
4. A higher value of C3 and C4 will reduce the level sensitivity tolerance at around -38dBm.
© 2001 Consumer Microcircuits Limited
8
D/673/5