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T15M256B

32K X 8 LOW POWER CMOS STATIC RAM

Taiwan Memory Technology 

tm TE

CH

CAPACITANCE

(Vcc = 5V / ± 10%, Ta = 25°C, f = 1 MHz)

PARAMETER

Input Capacitance

Input/ Output Capacitance

SYMBOL

CIN

CI/O

CONDITION

VIN = 0V

VOUT= 0V

Note: These parameters are sampled but not 100% tested.

T15M256B

MAX.

6

8

UNIT

pF

pF

AC TEST CONDITIONS

PARAMETER

Input Pulse Levels

Input Rise and Fall Times

Input and Output Timing Reference Level

Output Load

0V to 3V

3 ns

1.5V

See Fig. 1,2

CONDITIONS

AC TEST LOADS AND WAVEFORM

5V

OUTPUT

R1 - 1928 ohm

30pF

Including

Jig and

Scope

Fig 1

5V

OUTPUT

R2

1020 ohm

R1- 1928 ohm

5pF

Including

Jig and

Scope

R2

1020

ohm

(For TCLZ, TOLZ, TCHZ, TOHZ, TWHZ, TOW )

Fig 2

TM Technology Inc. reserves the right

P. 4

to change products or specifications without notice.

Publication Date: OCT. 2003

Revision:C

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