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TA8007F

5 V Voltage Regulator With Watchdog Timer

Toshiba 

TA8007S/F

Functional Description

The TA8007S/F incorporates a constant-voltage 5V power supply function to feed stable power to the CPU and

the system reset and CPU monitor functions to ensure stable operation of the CPU, etc. These functions are

explained below.

(1) Constant-voltage 5V power supply function

This constant-voltage function has the reference voltage Vref in the IC that is insusceptible to temperature

changes and input voltage fluctuations. The power supply circuit is designed in such a way that this

voltage is stepped up to 5V by using an OP amp and a voltage-dividing resistor. These OP amp and

dividing resistor and an output transistor connected to the OP amp output together configure a closed loop.

If you are using only the reset timer and not this power supply function, connect the BIAS, OUT, and

COMP pins to GND.

(2) System reset function (See Timing Chart)

· Voltage monitoring function

When powered on, the power-on reset timer starts counting the moment the voltage VCC applied to

the CPU exceeds 4.6V. When powered off, this voltage monitoring function outputs a reset signal

immediately when VCC drops below 4.6V. A reset signal also is output immediately when VCC drops

for some reason during normal operation. Then, when VCC is restored to the normal voltage and

exceeds 4.6V, the power-on reset timer starts counting.

· Power-on reset timer function

To allow the 5V constant voltage to stabilize at power-on, as well as provide a sufficient time for the

clock oscillation in the CPU to stabilize, the device remains reset for a predetermined time before

being released from the reset state. The duration of this time can be set as desired by choosing

appropriate values for the external resistor and capacitor connected to the TC pin.

The system starts charging the capacitor when the VCC voltage exceeds 4.6V. When this charge

voltage exceeds 4V, the capacitor is discharged by the IC’s internal transistor. When the capacitor is

discharged down to 2V, the reset signal is inverted to deactivate the reset.

· Watchdog timer function

Program your system to output a clock each time one program routine is finished in the CPU system

software, and input this clock to the CK pin of the IC. The IC‘s TC pin is repeatedly charged and

discharged between 2V and 4V. However, when a clock is input, it switches over and starts

discharging in the middle of charging and then starts charging from 2V again. Since the clock is

generated at predetermined intervals when the CPU system is operating normally, the TC pin

switches over and starts discharging before the charge voltage reaches 4V. However, if no clock is

input while being charged from 2V to 4V, the clock is assumed to have stopped, i.e., the CPU system

has gone wild, so that a reset signal is output to reset the CPU system.

The IC’s CK pin is connected to the CPU system with a differential circuit. This is to ensure that

when an erratic condition occurs in the CPU system, a low signal is always input to the CK pin

regardless of whether the clock output from the CPU has stopped in the high or low state. When the

CK pin is fixed high, no reset signal is output, in which case only the power-on reset timer is useful.

(3) CPU monitor function

The monitor output (M pin) uses the clock from the CK pin that is fed into the IC and the reset signal that

is output from the IC to provide an easy way to verify the operating status of your application system.

The M output is generated by a flip-flop that receives as its inputs the said reset and clock signals. During

normal operation, the output is held high by the clock fed to the CK pin. When the clock supply is stopped

by an error condition and a reset signal is output from the IC, the flip-flop is inverted by the reset signal,

causing the M output to go low. When the error condition is restored and the clock supply to CK restarts,

the flip-flop is inverted by that signal again, causing the M output to go high.

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2003-02-28

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