TDA9850 Ver la hoja de datos (PDF) - Philips Electronics
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TDA9850 Datasheet PDF : 32 Pages
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Philips Semiconductors
I2C-bus controlled BTSC stereo/SAP decoder
Preliminary specification
TDA9850
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
Noise detector
f0
noise band-pass centre composite input level
−
185
−
kHz
frequency
100 mV (RMS)
Q
quality factor
−
6
−
−
Ster1,
SAP1
lowest noise threshold
for stereo off respectively
SAP off (RMS value;
see Tables 11 and 12)
fi = 185 kHz
17
24
34
mV
Ster16,
SAP16
highest noise threshold fi = 185 kHz
for stereo off respectively
SAP off (RMS value)
210
290
400
mV
∆Ster,
∆SAP
noise threshold step width fi = 185 kHz
0
1.5
3
dB
Power-on reset; note 5
VRESET(STA) start of reset voltage
increasing supply voltage −
−
decreasing supply
4.2
5
voltage
VRESET(END) end of reset voltage
increasing supply voltage 5.2
6
Digital part (I2C-bus pins); note 6
VIH
HIGH level input voltage
VIL
LOW level input voltage
IIH
HIGH level input current
IIL
LOW level input current
VOL
LOW level output voltage IIL = 3 mA
3
−
−0.3
−
−10
−
−10
−
−
−
Notes to the characteristics
2.5
V
5.8
V
6.8
V
8.5
V
+1.5
V
+10
µA
+10
µA
0.4
V
1. Crosstalk: 20 log V--V---b-o-u--(-s-r-(m--p---s--p)--)
2. The transmission contains:
a) Total initialization with MAD and SAD for volume and 11 DATA words, see also definition of characteristics
b) Clock frequency = 50 kHz
c) Repetition burst rate = 400 Hz
d) Maximum bus signal amplitude = 5 V (p-p).
3. The oscillator is designed to operate together with MURATA resonator CSB503F58 or CSB503JF958 as SMD.
Change of the resonator supplier is possible, but the resonator specification must be close to the specified ones.
4. The internal SAP carrier level is determined by the composite input level and the level adjustment gain.
5. When reset is active the SMU-bit (SAP mute) and the LMU-bit (OUTL, OUTR mute) is set and the I2C-bus receiver
is in the reset position.
6. The AC characteristics are in accordance with the I2C-bus specification for standard mode (clock frequency
maximum 100 kHz). A higher frequency, up to 280 kHz, can be used if all clock and data times are interpolated
between standard mode (100 kHz) and fast mode (400 kHz) in accordance with the I2C-bus specification.
Information about the I2C-bus can be found in brochure “I2C-bus and how to use it” (order number 9398 393 40011).
1995 Jun 19
14
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