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TDA9950
NXP
NXP Semiconductors. NXP
TDA9950 Datasheet PDF : 22 Pages
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NXP Semiconductors
TDA9950
CEC/I2C-bus translator
Table 3. Pin description …continued
Symbol
Pin Type[1] Description
RST
4
I
RST — External reset input. A LOW state on this pin resets the
translator.
VSS
XTAL1
5
P
6
I
Ground: 0 V reference (GND).
XTAL1 — Input to the oscillator circuit and internal clock
generator circuits (12 MHz crystal).
XTAL2
7
O
XTAL2 — Output from the oscillator amplifier.
CEC_IN
8
I
CEC_IN — Input for CEC line.
SDA
9
I/O
SDA — I2C-bus serial data input/output (open-drain).
SCL
10 I
SCL — I2C-bus serial clock input.
RSVD2
11 I
RSVD2 — Reserved pin (should be connected to ground).
RSVD3
12 O
RSVD3 — Reserved pin.
RSVD4
13 O
RSVD4 — Reserved pin.
RSVD5
14 I
RSVD5 — Reserved pin (should be connected to ground).
VDD
15 P
Power supply — This is the (core digital 3.3 V) power supply
voltage for normal operation as well as Idle and Power-down
modes.
RSVD6
16 I
RSVD6 — Reserved pin (should be connected to ground).
RSVD7
17 I
RSVD7 — Reserved pin (should be connected to ground).
INT_POL 18 I
INT_POL — Sets the polarity of the active output required on
the INT signal (pin 2). Leave floating or pull-up to VDD for a
HIGH output when active (rising edge), connect to VSS for a
LOW output when active (falling edge). This input is latched at
reset.
A1
19 I
A1 — I2C-bus slave address bit 2.
A0
20 I
A0 — I2C-bus slave address bit 1.
[1] I = input, O = output, P = power supply.
8. Functional description
The TDA9950 uses an internal processor with embedded software to control the interface
between the CEC line and the I2C-bus.
8.1 Device addressing
The TDA9950 is a slave I2C-bus device and the SCL pin is an input pin only. The timing
and protocol for the I2C-bus are standard.
Table 4. Device address code
Address code Device code
Chip enable
R/W
Bit
b7[1]
b6
b5
b4
b3
b2
b1
b0
Value
0
1
1
0
1
A1
A0
R/W
[1] The Most Significant Bit (MSB), b7, is sent first.
A1 and A0 are hardware-selectable pins.
TDA9950_2
Product data sheet
Rev. 02 — 22 October 2009
© NXP B.V. 2009. All rights reserved.
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