LX1668 Ver la hoja de datos (PDF) - Microsemi Corporation
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LX1668 Datasheet PDF : 15 Pages
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PRODUCT DATABOOK 1996/1997
LX1668
P ROGRAMMABLE MULTIPLE OUTPUT DC:DC CONTROLLER
PRODUCTION DATA SHEET
Pin
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin
Designator
TDRV
VCC12
VCC5
VOUT2
VCC3
LDRV
LFB
VID0
VID1
VID2
VID3
VID4
OVP
PWRGD
VCORE
VFB
SS/ENABLE
AGND
BDRV
PGND
FUNCTIONAL PIN DESCRIPTION
Description
Gate drive to the top FET.
+12V supply for the gate drivers. If 12V is not available in the application, a bootstrap circuit is required
to create the biasing voltage for the FET gate drivers.
+5V supply for internal biasing and power to the IC.
Fixed 2.5V internal LDO regulator output.
Input for the 2.5V internal LDO regulator — Recommended to be connected to 5V.
Adjustable LDO driver output. Connect to gate of MOSFET.
Voltage feedback pin of the adjustable LDO regulator (1.5V).
Input pins to the DAC. The output of the DAC sets the nominal voltage of the PWM output (see Table 1).
These inputs are TTL-compatible.
Over-voltage protection: this pin is pulled to above 2V when the switcher output is above 17% of its set
voltage. This pin is capable of sourcing 40mA current, and can be used to drive an SCR crowbar or as a
signal to turn off the main power supply.
Open collector output, pulled down when the core voltage is not within ±10% of the DAC output or the
fixed 2.5V LDO output is below 2.0V.
Output (CPU core) voltage, connected to the output of the regulator (after the sense resistor). This pin is
also connected to the power good and the over current comparators in the IC.
Dual function pin for feedback and current sensing. The peak voltage of this is set 40mV above the
nominal set-point (VID) voltage. When the voltage difference between this pin and VOUT (pin 15) exceeds
60mV, the over current comparator will be tripped. The over current tripping level can be set as
I = 60mV/RSENSE where RSENSE is the sensing resistance (see Application Note section).
Soft-startup and hiccup capacitor pin. During startup, the voltage of this pin controls the core voltage. An
internal 20kΩ resistor and the external capacitor set the time constant for the soft-startup. Soft-start does
not begin until the supply voltage exceeds the UVLO threshold. When over-current occurs, this capacitor is
used for timing the hiccup. See Application Information for more detail. The PWM output can be disabled
by pulling the SS/ENABLE pin below 0.5V.
Analog ground.
Bottom FET drive.
Power ground. Ground return for FET drivers.
6
Copyright © 1999
Rev. 1.0 4/99
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