W65C21S Ver la hoja de datos (PDF) - Unspecified
Número de pieza
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W65C21S Datasheet PDF : 16 Pages
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The Western Design Center, Inc.
AC TIMING CHARACTERISTICS
W65C21S Data Sheet
Parameter
PHI2 Cycle
PHI2 Pulse Width
PHI2 Rise and Fall Time
READ TIMING
Parameter
Address Set-Up Time
Address Hold Time
Peripheral Data Setup Time
Data Bus Delay Time
Data Bus Hold Time
14 MHz @ 5V
Symbol Min Max Unit
tCYC
70
tC
35
trc tfc
-
-
ns
-
ns
5
ns
14 MHz @ 5V
Symbol Min Max Unit
tACR
10
-
ns
tCAR
0
-
ns
tPCR
10
-
ns
tCDR
-
20 ns
t HR
5
-
ns
WRITE TIMING
Parameter
Address Set-Up Time
Address Hold Time
Data Bus Set-Up Time
Data Bus Hold Time
Peripheral Data Delay Time
14 MHz @ 5V
Symbol Min Max Unit
tACW
10
-
ns
tCAW
0
-
ns
tDCW
10
-
ns
tHW
5
-
ns
tCPW
-
20 ns
PERIPHERAL INTERFACE TIMING
Parameter
14 MHz @ 5V
Symbol Min Max Unit
PHI2 Low to CA2 Low Delay
tCA2
-
20
ns
PHI2 Low to CA2 High Delay
CA1 Active to CA2 High Delay
PHI2 High to CB2 Low Delay
Peripheral Data Valid to CB2 Low
Delay
tRS1
-
20
ns
tRS2
-
25
ns
tCB2
-
70
ns
tDC
5
-
ns
PHI2 High to CB2 High Delay
CB1 Active to CB2 High Delay
CA1, CA1, CB1, and CB2
Input Rise and Fall Time
tRS1
-
20
ns
tRS2
-
25
ns
tr, tf
-
10
ns
Interrupt Input Pulse Width
Interrupt Response Time
Interrupt Clear Delay
PWI
-
70
ns
tRS3
-
20
ns
tIR
-
25
ns
The Western Design Center
W65C21S
6
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