W65C21S Ver la hoja de datos (PDF) - Unspecified

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W65C21S

Peripheral Interface Adapter (PIA)

Unspecified 

The Western Design Center, Inc.

CA1,CA2

CB1,CB2

IRQAB, IRQBB

PWI

tRS3

Figure 7. Interrupt Timing

W65C21S Data Sheet

PHI2

tIR

IRQAB, IRQBB

Figure 8. Interrupt Clear Timing

Table 1. Control Registers

REGISTER

SELECT PIN

RS1 RS0

0

0

0

0

0

1

1

0

1

0

1

1

DATA

DIRECTION

REGISTER

ACCESS

CONTROL BIT

CRA-2 CRB-2

1

-

0

-

-

-

-

1

-

0

-

-

REGISTER SELECTED

Peripheral Interface A

Data Direction Register A

Control Register A

Peripheral Interface B

Data Direction Register B

Control Register B

Table 2 Register Addressing

DDR

DATA

P

P

PIN

N

INPUT

Figure 9 Port A, CA2 Buffers

DDR

P

PIN

DATA

INPUT

(OUTPUT MODE)

N

INPUT

(INPUT MODE)

Figure 10 Port B, CB2 Buffers

The Western Design Center

W65C21S

9

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