W83626D Ver la hoja de datos (PDF) - Winbond

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W83626D

LPC TO ISA BRIDGE SET

Winbond 

W83626F/W83626D/W83626G

5.1.3 K/B, GPIO AND 80h PCS# Function

SYMBOL PIN

I/O

FUNCTION

80PCS#

KBEN#

36 I/OD12t 80h PORT Chip Select.(Default)

Only decode IO address port 80h and must apply with IOW#.

K/B Functions Enable. During power-on reset this pin is weak

pulled-up internally. The pin applied a pull-down resistor (4.7K

ohm) to enable K/B functions. (IRQ1,KBCS#,and MCCS#)

ROMCS#

37 I/OD12t ROMCS#, this pin enable positive decoder of BIOS address range

[depend on CR03, bit 1 or external weak pulled-up during PCIRST

is asserted].

GPIO0

IRQ1

38 I/OD12t General purpose I/O pin 0.

Parallel Interrupt Requested Input 1. This interrupt request is used

for specific K/B functions.

GPIO1

KBCS#

39 I/O12t General purpose I/O pin 1.

Decode the address 60h and 64h to output chip selected signal.

Enable by KBEN# power-on setting.

GPIO2

MCCS#

40 I/OD12t General purpose I/O pin 2.

Decode the address 62h and 66h to output chip selected signal

Enable by KBEN# power-on setting

GPIO3

IRQIN

62 I/OD12t General purpose I/O pin 3.

Programmable parallel IRQ input transfers to serial IRQ

Enable by KBEN# power-on setting

GPIO4

PLED

63 I/OD12t General purpose I/O pin 4.

Power LED output, this signal is low after system reset.

GPIO5

IRQ8

64 I/OD12t General purpose I/O pin 5.

Parallel Interrupt Requested Input 8. This interrupt request is used

for specific RTC functions. Enable by RTCEN# power-on setting

GPIO6

RTCCS#

65 I/OD12t General purpose I/O pin 6.

Decode the address 70h and 71h to output chip selected signal

Enable by RTCEN# power-on setting

GPIO7

IOHCS#

66 I/OD12t General purpose I/O pin 7.

Decode SA [15-11] is all 0 and setting by CR04 Bit 6.

Publication Release Date: May 25, 2005

-9-

Revision A1

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