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W89C982

INTEGRATED MULTIPLE REPEATER II

Winbond 

Preliminary W89C982AF

The other main function of the management logic is the port activity monitoring function. The internal

carrier sense signal of all network ports is sampled out serially. The accuracy of the carrier sense

signals is 10 bit times. The first bit samples the internal carrier sense signal of the AUI port, the

second bit samples TP0, the third bit samples TP1, and so forth. The tenth bit time is idle, and a

strobe signal will be active during the tenth bit time. With the help of the strobe signal, the serial

sampled carrier sense signal can be latched to a serial-to-parallel shifter.

IMPR II Programmable Options

Three IMPR II programmable options can set by this command via the appropriate bit in MSI data.

The three programmable options are CI reporting, AUI SQE test mask, and alternative port activity

monitor function, which correspond to bits C, S, and A, respectively.

CI Reporting

Setting bit C = 1 will alter the function of the STR pin. STR will become an input pin for repeater

management devices and PCRS will insert the CI bit immediately before the AUI bit.

AUI SQE Test Mask

Setting S = 1 will disable the AUI SQE test when the SQE signal is within the SQE test window and

no jam pattern will be asserted after transmitted packets. The SQE test window is from 6 bit times to

34 bit times. When the SQE signal is larger than the SQE test window, a collision condition has

occurred.

Alternative Port Activity Monitor

Setting A = 1 will enable the alternative PAM function, so that repeater management devices can

monitor the status of each port using the unmodified PCRS signal.

The IMPR II Kernel Logic

The kernel logic of the IMPR II includes a main state machine and glue logic, timers and counters,

jabber lockup and fragment extension logic, a PLL decoder, encoder and transmitter, a 64-bit FIFO

with FIFO control logic, and a preamble/jam generator. These blocks perform most of the operations

needed to fulfill the requirements of the IEEE repeater specification. When a packet is received by a

connected port, it is sent via the receive multiplexer to the PLL decoder. Data and collision status are

sent to the main state machine via the port partition/reconnection logic. This enables the main state

machine to determine the source of data to be repeated and the type of data to be transmitted. The

transmit data may be either the received packet's data field or a preamble/jam pattern consisting of a

1010... bit pattern.

Associated with the main state machine are a series of timers and counters which ensure that various

IEEE specification times (referred to as the TW1 to TW6 times) are fulfilled. The PLL decoder

decodes the received data from Manchester code format into NRZ format and recovers the jitter

accumulated over the receiving segment.

The preamble/jam generator and the FIFO compensate for the preamble bit loss caused by

receptions by the twisted pair line transceiver. The FIFO is used to store the bits of the data field

temporarily while the preamble/jam generator is sending the preamble of the transmitting packet. A

1010... jam pattern is generated under network collision conditions.

The jabber lockup and fragment extension logic monitors the retransmitted packet. A jam pattern will

be appended to short packets (less than 96 bits in length) to extend them to a full 96 bits. The jabber

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Publication Release Date: November 1996

Revision A1

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