XR16C850 Ver la hoja de datos (PDF) - Exar Corporation

Número de pieza

componentes Descripción

Lista de partido

XR16C850

UART with 128-byte FIFO’s FIFO Counters and Half-duplex Control

Exar Corporation 

XR16C850

SYMBOL DESCRIPTION

Symbol

A8 / IOW

A9

-AEN / -AS

-BAUDOUT

D0-D7

D10, D11,

D12

Pin

Signal

40 44 48 52 type

Pin Description

to GND when CS0 or CS1 is used.

19 21 17 18

I

Address-8 Select Bit or Input/Output Write (dual

function) - When the PC mode is selected, this pin

is used as 9th address line to decode the COM1-4

and LPT ports. During STD mode, a logic 1 transition

creates a write strobe. Its function is the same as -

IOW (see -IOW), but it acts as an active high input

signal. Either -IOW or IOW is required to transfer

data from the CPU to 850 during a write operation.

Connect this pin to GND when –IOW is used.

-

1

37 40

I

Address-9 Select Bit (internal pull-up) - When the

PC mode is selected, this pin is used as 10th

address line to decode the COM1-4 and LPT ports.

This pin has no function in the STD mode.

25 28 24 26

I

Address Enable or Address Strobe (dual function) -

. During PC mode operation, valid COM1-4 ports are

decoded when -AEN transitions to a logic 0. During

the STD mode a logic 0 transition on -AS latches the

state of the chip selects and the register select bits,

A0-A2. This input is used when address and chip

selects are not stable for the duration of a read or

write operation, i.e., a microprocessor that needs to

demultiplex the address and data bits. If not re-

quired, the -AS input can be permanently tied to

GND (it is edge triggered).

(See LPT-1)

1-8 2-9 43-47 47-51

2-4 2-4 I/O Data Bus (Bi-directional) - These pins are the eight

bit, three state data bus for transferring information

to or from the controlling CPU. D0 is the least

significant bit and the first data bit in a transmit or

receive serial data stream.

-

- 48,1 52,1

22

24

O

High order data bus. When 16 bit data bus (BUS8/

16 = logic zero) is selected, received data errors

(parity, framing, break) can be read along with its

data byte on these pins. D10 is parity error bit, D11

Rev. 1.20

6

Share Link: