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RTL8196

IEEE 802.11n AP/ROUTER NETWORK PROCESSOR WITH EEE

Realtek Semiconductor 

RTL8196C

Datasheet

List of Tables

TABLE 1. PIN DESCRIPTIONS ........................................................................................................................................................6

TABLE 2. RTL8196C CONFIGURATION UPON POWER ON STRAPPING .........................................................................................9

TABLE 3. SHARED I/O PIN MAPPING ..........................................................................................................................................10

TABLE 4. MEMORY CONTROL REGISTER (MCR) (0XB800_1000) .............................................................................................13

TABLE 5. DRAM CONFIGURATION REGISTER (DCR) (0XB800_1004)......................................................................................14

TABLE 6. DRAM TIMING REGISTER (DTR) (0XB800_1008).....................................................................................................15

TABLE 7. NOR FLASH CONFIGURATION REGISTER (NFCR) (0XB800_1100)............................................................................16

TABLE 8. SPI FLASH CONFIGURATION REGISTER (SFCR) (0XB800_1200) ...............................................................................16

TABLE 9. SPI FLASH CONFIGURATION REGISTER 2 (SPCR2) (0XB800_1204) ..........................................................................17

TABLE 10. SPI FLASH CONTROL AND STATUS REGISTER (SFCSR) (0XB800_1208) ..................................................................18

TABLE 11. SPI FLASH DATA REGISTER (SFDR) (0XB800_120C)...............................................................................................18

TABLE 12. SPI FLASH DATA REGISTER 2 (SFDR2) (0XB800_1210)...........................................................................................19

TABLE 13. GPIO REGISTER SET (0XB800_3500)........................................................................................................................20

TABLE 14. GPIO PORT A, B, C, D CONTROL REGISTER (PABCD_CNR) (0XB800_3500) .........................................................20

TABLE 15. GPIO PORT A, B, C, D DIRECTION REGISTER (PABCD_DIR) (0XB800_3508) ........................................................20

TABLE 16. PORT A, B, C, D DATA REGISTER (PABCD_DAT) (0XB800_350C).........................................................................21

TABLE 17. PORT A, B, C, D INTERRUPT STATUS REGISTER (PABCD_ISR) (0XB800_3510)......................................................21

k TABLE 18. PORT A, B INTERRUPT MASK REGISTER (PAB_IMR) (0XB800_3514) .....................................................................21

TABLE 19. PORT C, D INTERRUPT MASK REGISTER (PCD_IMR) (0XB800_3518) .....................................................................22

TABLE 20. SHARED PIN REGISTER (PIN_MUX_SEL) (0XB800_0040) ......................................................................................22

lte TABLE 21. OPERATING CONDITIONS ...........................................................................................................................................25

TABLE 22. POWER DISSIPATION ..................................................................................................................................................25

L TABLE 23. SDRAM BUS DC PARAMETERS ................................................................................................................................26

TABLE 24. FLASH BUS DC PARAMETERS ....................................................................................................................................26

a IA TABLE 25. USB 1.1 DC PARAMETERS.........................................................................................................................................27

TABLE 26. USB 2.0 DC PARAMETERS.........................................................................................................................................27

T TABLE 27. UART DC PARAMETERS ...........................................................................................................................................27

e N N TABLE 28. GPIO DC PARAMETERS.............................................................................................................................................28

R E IO TABLE 29. JTAG DC PARAMETERS ............................................................................................................................................28

TABLE 30. LED DC PARAMETERS ..............................................................................................................................................28

T TABLE 31. CLOCK SIGNAL TIMING..............................................................................................................................................29

ID A TABLE 32. SDRAM CLOCK TIMING............................................................................................................................................30

R TABLE 33. SDRAM INPUT TIMING .............................................................................................................................................31

TABLE 34. SDRAM OUTPUT TIMING..........................................................................................................................................31

F O TABLE 35. SDRAM ACCESS CONTROL TIMING ..........................................................................................................................32

N P TABLE 36. FLASH ACCESS TIMING VALUES ................................................................................................................................33

R TABLE 37. POWER-UP TIMING PARAMETERS ..............................................................................................................................33

O O TABLE 38. THERMAL OPERATING RANGE ...................................................................................................................................36

C C TABLE 39. RTL8196C THERMAL PARAMETERS..........................................................................................................................36

for ZTE TABLE 40. ORDERING INFORMATION ..........................................................................................................................................38

IEEE 802.11n AP/Router Network Processor with EEE v

Track ID: JATR-2265-11 Rev. 0.7

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