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L4904A Ver la hoja de datos (PDF) - STMicroelectronics

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L4904A
ST-Microelectronics
STMicroelectronics ST-Microelectronics
L4904A Datasheet PDF : 9 Pages
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Figure 2
L4904A
APPLICATION SUGGESTIONS
Figure 3 shows an application circuit for a µP
system.
Reg. 1 is permanently connected to a battery and
supplies a CMOS time-of-day clock and a CMOS
microcomputer chip with volatile memory.
Reg. 2 may be switched OFF when the system is
inactive.
Figure 4 shows the L4904A with a back up battery
on the V01 output to maintain a CMOS time-of-day
Figure 3
clock and a stand by type C-MOS µP. The reset
output makes sure that the RAM is forced into the
low consumption stand by state, so the access to
memory is inhibit and the back up battery voltage
cannot drop so low that memory contents are cor-
rupted.
In this casethe main on-off switch disconnects both
regulators from the supply battery.
Application Circuits of a Microprocessor system
(Figure 3) or with data save battery (Figure 4). The
reset output provide delayed rising front at the
5/9

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