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T7502

Dual PCM Codec with Filters

Agere -> LSI Corporation 

Data Sheet

February 1998

T7502 Dual PCM Codec with Filters

Features

s +5 V only

s Automatic powerdown mode

s Low-power, latch-up-free CMOS technology

s On-chip sample and hold, autozero, and precision

voltage reference

s Differential architecture for high noise immunity

and power supply rejection

s Automatic master clock frequency selection

s 2.048 MHz or 4.096 MHz fixed data rate

s Frame sync controlled channel swapping

s Differential analog I/O

s 300 Ω output drivers

s Operating temperature range: –40 °C to +85 °C

s A-law companding

Applications

s Speakerphone

s Telephone answering device (TAD)

s POTS for ISDN

Description

The T7502 device is a single-chip, two-channel

A-law PCM codec with filters. This integrated circuit

provides analog-to-digital and digital-to-analog

conversion. It provides the transmit and receive

filtering necessary to interface a voice telephone

circuit to a time-division multiplexed (TDM) system.

The device features a differential transmit amplifier,

and the power receive amplifier is capable of driving

600 Ω differentially. PCM timing is defined by a single

frame sync pulse. This device operates in a delayed

timing mode (digital data is valid one clock cycle after

frame sync goes high). The T7502 is packaged in a

20-pin SOJ.

GSX0

VFXIN0

VFXIP0

VCM0

VFROP0

VFRON0

GSX1

VFXIN1

VFXIP1

VCM1

VFROP1

VFRON1

–

FILTER

+

NETWORK

+2.4 V CHANNEL 0

ENCODER

PCM

INTERFACE

FILTER

NETWORK

DECODER

CHANNEL 1

POWERDOWN

CONTROL

INTERNAL TIMING

& CONTROL

BIAS

CIRCUITRY

&

REFERENCE

Figure 1. Block Diagram

DX

DR

GNDD

FS

MCLK

VDD (1)

GNDA (2)

5-3609.b

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