A416316B Ver la hoja de datos (PDF) - AMIC Technology
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A416316B Datasheet PDF : 25 Pages
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Preliminary
A416316B Series
64K X 16 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Features
n Organization: 65,536 words X 16 bits
n Part Identification:
- A416316B
- A416316B-L (with self-refresh mode)
n High speed
- 30/35/40 ns RAS access time
- 16/18/20 ns column address access time
- 10/11/12 ns CAS access time
n Low power consumption
- Operating: 75mA (-30 max)
- Standby: 3 mA (TTL)
Pin Configuration
n SOJ
nTSOP
VCC 1
I/O0
2
I/O1
3
I/O2
4
I/O3
5
VCC 6
I/O4
7
I/O5
8
I/O6
9
I/O7
10
NC 11
NC 12
WE 13
RAS 14
NC 15
A0 16
A1 17
A2 18
A3 19
VCC 20
40
VSS
39
I/O 15
38
I/O14
37
I/O13
36
I/O12
35
VSS
34
I/O11
33
I/O10
32
I/O9
31
I/O8
30
NC
29
LCAS
28
UCAS
27
OE
26 NC
25
A7
24
A6
23
A5
22
A4
21
VSS
VCC 1
I/O0
2
I/O1
3
I/O2
4
I/O3
5
VCC 6
I/O4
7
I/O5
8
I/O6
9
I/O7
10
NC 13
NC 14
WE 15
RAS 16
NC 17
A0 18
A1 19
A2 20
A3 21
VCC 22
44 VSS
43
I/O 15
42
I/O14
41
I/O13
40
I/O12
39
VSS
38
I/O11
37
I/O10
36
I/O9
35
I/O8
32 NC
31
LCAS
30
UCAS
29 OE
28 NC
27 A7
26 A6
25 A5
24 A4
23 VSS
n Separate CAS ( UCAS , LCAS ) for byte selection
n Self refresh mode
n 256 refresh cycles, 4 ms refresh interval
n Read-modify-write, RAS -only, CAS -before- RAS ,
Hidden refresh capability
n TTL-compatible, three-state I/O
n JEDEC standard packages
- 400mil, 40-pin SOJ
- 400mil, 40/44 TSOP type II package
n Single 5V power supply/built-in VBB generator
Pin Descriptions
Symbol
Description
A0 – A7 Address Inputs
I/O0 - I/O15 Data Input/Output
RAS
Row Address Strobe
UCAS
Column Address Strobe/Upper Byte Control
LCAS
Column Address Strobe/Lower Byte Control
WE
Write Enable
OE
Output Enable
VCC
+5V Power Supply
VSS
Ground
NC
No Connection
PRELIMINARY (November, 2000, Version 0.0)
1
AMIC Technology, Inc.
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