AD834S Ver la hoja de datos (PDF) - Analog Devices
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AD834S Datasheet PDF : 12 Pages
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AD834
POWER MEASUREMENT (MEAN SQUARE AND RMS)
The AD834 is well-suited to measurement of average power in
high-frequency applications, connected either as a multiplier for
the determination of the V ¥ I product, or as a squarer for use
with a single input. In these applications, the multiplier is followed
by a low-pass filter to extract the long-term average value. Where
the bandwidth extends to several hundred megahertz, the first
pole of this filter should be formed by grounded capacitors placed
directly at the output pins W1 and W2. This pole can be at a
few kilohertz. The effective multiplication or squaring bandwidth
is then limited solely by the AD834, since the following active
circuitry is required to process only low-frequency signals.
(Refer to Figure 2 test circuit.) Using the device as a squarer,
the wideband output in response to a sinusoidal stimulus is a
raised cosine:
sin2 wt = (1 – cos 2 wt)/2
Recall here that the full-scale output current (when full-scale
input voltages of 1 V are applied to both X and Y) is 4 mA. In a
50 W system, a sinusoid power of +10 dBm has a peak value of
1 V. Thus, at this drive level the peak output voltage across the
differential 50 W load in the absence of the filter capacitors would
be 400 mV (that is, 4 mA ¥ 50 W ¥ 2), whereas the average
value of the raised cosine is only 200 mV. The averaging con-
figuration is useful in evaluating the bandwidth of the AD834,
since a dc voltage is easier to measure than a wideband differential
output. In fact, the squaring mode is an even more critical test
than the direct measurement of the bandwidth of either channel
taken independently (with a dc input on the nonsignal channel),
because the phase relationship between the two channels also
affects the average output. For example, a time delay difference
of only 250 ps between the X and Y channels would result in
zero output when the input frequency is 1 GHz, at which
frequency the phase angle is 90 degrees and the intrinsic prod-
uct is now between a sine and cosine function, which has zero
average value.
The physical construction of the circuitry around the IC is
critical to realizing the bandwidth potential of the device. The
input is supplied from an HP8656A signal generator (100 kHz
to 990 MHz) via an SMA connector and terminated by an
HP436A power meter using an HP8482A sensor head connected
via a second SMA connector. Since neither the generator nor
the sensor provide a dc path to ground, a lossy 1 mH inductor
L1, formed by a 22-gauge wire passing through a ferrite bead
(Fair-Rite type 2743001112) is included. This provides adequate
impedance down to about 30 MHz. The IC socket is mounted
on a ground plane with a clear area in the rectangle formed by
the pins. This is important since significant transformer action
can arise if the pins pass through individual holes in the board;
it has been seen to cause an oscillation at 1.3 GHz in improperly
constructed test jigs. The filter capacitors must be connected
directly to the same point on the ground plane via the shortest
possible leads. Parallel combinations of large and small capaci-
tors are used to minimize the impedance over the full frequency
range. Refer to TPC 1 for mean-square response for the AD834
in cerdip package, using the configuration of Figure 2.
To provide a square root response and thus generate the rms
value at the output, a second AD834, also connected as a
squarer, can be used as shown in Figure 10. Note that an
attenuator is inserted both in the signal input and in the feed-
back path to the second AD834. This increases the maximum
input capability to +15 dBm and improves the response flatness
by damping some of the resonances. The overall gain is unity;
that is, the output voltage is exactly equal to the rms value of
the input signal. The offset potentiometer at the AD834 out-
puts extends the dynamic range and is adjusted for a dc output
of 125.7 mV when a 1 MHz sinusoidal input at –5 dBm is applied.
Additional filtering is provided; the time constants were chosen
to allow operation down to frequencies as low as 1 kHz and to
provide a critically damped envelope response, which settles
typically within 10 ms for a full-scale input (and proportionally
slower for smaller inputs). The 5 mF and 0.1 mF capacitors may
be scaled down to reduce response time if accurate rms operation
at low frequencies is not required. The output op amp must be
specified to accept a common-mode input near its supply. Note
that the output polarity may be inverted by replacing the NPN
transistor with a PNP type.
INPUT
49.9⍀
24.9⍀
1F
49.9⍀
8765
X2 X1 +VS W1
5F
AD834
Y1 Y2 –VS W2
1234
5F
49.9⍀
49.9⍀
24.91⍀
1F
49.9k⍀
75⍀
100⍀
100⍀
47.5k⍀
10k⍀
15k⍀
15k⍀
8765
X2 X1 +VS W1
AD834
Y1 Y2 –VS W2
1234
100⍀ 100⍀
10⍀
+5V
0.1F
33pF
+
AD301
–
0.1F
2N3904
OUTPUT
–5V
Figure 10. Connections for Wideband RMS Measurement
–8–
REV. D
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