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AD834AR Ver la hoja de datos (PDF) - Analog Devices

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AD834AR
ADI
Analog Devices ADI
AD834AR Datasheet PDF : 12 Pages
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FREQUENCY DOUBLER
Figure 11 shows another squaring application. In this case, the
output filter has been removed and the wideband differential
output is converted to a single-sided signal using a balun,
which consists of a length of 50 W coax cable fed through a
ferrite core (Fair-Rite Type 2677006301). No attempt is
made to reverse terminate the output. Higher load power
could be achieved by replacing the 50 W load resistors with
ferrite bead inductors. The same precautions should be observed
SMA FROM
HP8656A
GENERATOR
0.1F
75
8765
X2 X1 +VS W1
AD834
Y1 Y2 –VS W2
1234
49.9
49.9
0.1F
+5V
SMA TO
HP8568A
SPECTRUM
ANALYZER
560pF
560pF
BALUN
1H
0.1F 10
0.1F
–5V
Figure 11. Frequency Doubler Connections
with regard to PC board layout as recommended above. The
output spectrum shown in Figure 12 is for an input power of
+10 dBm at a frequency of 200 MHz. The second harmonic
component at 400 MHz has an output power of –15 dBm.
Some feedthrough of the fundamental occurs: it is 15 dB below
the main output. It is believed that improvements in the design
of the balun would reduce this feedthrough. A spurious output
at 600 MHz is also present, but it is 30 dB below the main
output. At an input frequency of 100 MHz, the measured
power level at 200 MHz is –16 dBm, while the fundamental
feedthrough is reduced to 25 dB below the main output; at an
output of 600 MHz the power is –11 dBm and the third
harmonic at 900 MHz is 32 dB below the main output.
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
150 200 250 300 350 400 450 500 550 600 650
FREQUENCY – MHz
Figure 12. Output Spectrum for Configuration of Figure 11
WIDEBAND THREE-SIGNAL MULTIPLIER/DIVIDER
Two AD834s and a wideband op amp can be connected to
make a versatile multiplier/divider having the transfer function
(X1 – X 2)(Y1 – Y 2)
W=
(U1 - U 2)
+Z
AD834
with a denominator range of about 100:1. The denominator
input U = U1 – U2 must be positive and in the range 100 mV
to 10 V; X, Y, and Z inputs may have either polarity. Figure 13
shows a general configuration that may be simplified to suit a
particular application. This circuit accepts full-scale input volt-
ages of 10 V, and delivers a full-scale output voltage of 10 V.
The optional offset trim at the output of the AD834 improves
the accuracy for small denominator values. It is adjusted by
nulling the output voltage when the X and Y inputs are zero and
U = 100 mV.
The AD840 is internally compensated to be stable without the
use of any additional HF compensation. As the input U is
reduced, the bandwidth falls because the feedback around the
op amp is proportional to the input U.
This circuit may be modified in several ways. For example, if
the differential input feature is not needed, the unused input
can be connected to ground through a single resistor, equal to
909
X1
100
0.1F
75
7.5V
+15V
100
X2
909
909
Y1
8765
X2 X1 +VS W1
AD834
Y1 Y2 –VS W2
1234
100
0.1F
100100
4.7
0.1F
100
Y2
909
909
U1
100
20k
0.1F
(A3)
AD840
W
؎10V
100
U2
909
8765
X2 X1 +VS W1
AD834
Y1 Y2 –VS W2
909
Z
1234
100
0.1F
100
909
10k
0.1F
4.7
7.5V
–15V
Figure 13. Wideband Three-Signal Multiplier/Divider
the parallel sum of the resistors in the attenuator section. The
full-scale input levels on X, Y, and U can be adapted to any
full-scale voltage down to ± 1 V by altering the attenuator ratios.
Note, however, that precautions must be taken if the attenuator
ratio from the output of A3 back to the second AD834 (A2) is
lowered. First, the HF compensation limit of the AD840 may
be exceeded if the negative feedback factor is too high. Second,
if the attenuated output at the AD834 exceeds its clipping level
of ± 1.3 V, feedback control will be lost and the output will
suddenly jump to the supply rails. However, with these limi-
tations understood, it will be possible to adapt the circuit to
smaller full-scale inputs and/or outputs, and for use with lower
supply voltages.
REV. D
–9–

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