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ADG786BCP Ver la hoja de datos (PDF) - Analog Devices

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componentes Descripción
Lista de partido
ADG786BCP Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADG786/ADG788
RS
VS
VIN
VDD
VSS
VDD
VSS
ADG786/
ADG788
S
D
EN*
GND
VOUT
CL
1nF
3V
LOGIC
INPUT (VIN)
0V
VOUT
QINJ = CL ؋ VOUT
VOUT
* IN14 for ADG734
Test Circuit 7. Charge Injection
VDD
0.1F
VSS
0.1F
IN
VIN
VDD
VSS
S
D
GND
50
NETWORK
ANALYZER
50
VS
RL VOUT
50
VOUT
OFF ISOLATION = 20 LOG VS
Test Circuit 8. OFF Isolation
NETWORK
ANALYZER
VOUT
RL
50
50
VS
VDD
0.1F
VSS
0.1F
VDD
VSS
SA
SB
IN
D
R
50
GND
CHANNEL-TO-CHANNEL
CROSSTALK
=
20 LOG
VOUT
VS
Test Circuit 9. Channel-to-Channel Crosstalk
VDD
0.1F
VSS
0.1F
VDD
VSS
IN
VIN
S
D
GND
NETWORK
ANALYZER
50
VS
RL VOUT
50
INSERTION LOSS = 20 LOG VOUT WITH SWITCH
VOUT WITHOUT SWITCH
Test Circuit 10. Bandwidth
Power Supply Sequencing
When using CMOS devices, care must be taken to ensure cor-
rect power supply sequencing. Incorrect sequencing can result
in the device being subjected to stresses beyond those maximum
ratings listed in the data sheet. Digital and analog inputs should
be applied to the device after supplies and ground. In dual sup-
ply applications, if digital and analog inputs may be applied
prior to VDD and VSS supplies, the addition of a Schottky diode
connected between VSS and GND will ensure that the device
powers on correctly. For single supply applications, VSS should
be tied to GND as close to the device as possible.
–10–
REV. 0

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