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ADL5390ACPZ-WP(RevA) Ver la hoja de datos (PDF) - Analog Devices

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ADL5390ACPZ-WP
(Rev.:RevA)
ADI
Analog Devices ADI
ADL5390ACPZ-WP Datasheet PDF : 23 Pages
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Data Sheet
EVALUATION BOARD
The evaluation board circuit schematic for the ADL5390 is shown
in Figure 44.
The evaluation board is configured to be driven from a
single-ended 50 Ω source. Although the input of the ADL5390
is differential, it may be driven single-ended with no loss of
performance.
The low-pass corner frequency of the baseband I and Q
channels can be reduced by installing capacitors in the C11 and
C12 positions. The low-pass corner frequency for either
channel is approximated by
45 kHz × 10 nF
f 3 dB Cexternal + 0.5 pF
On this evaluation board, the I and Q baseband circuits are
identical to each other, so the following description applies to
each. The connections and circuit configuration for the I/Q
baseband inputs are described in Table 4.
ADL5390
The baseband input of the ADL5390 requires a differential
voltage drive. The evaluation board is set up to allow such a
drive by connecting the differential voltage source to QBBP and
QBBM. The common-mode voltage should be maintained at
approximately 0.5 V. For this configuration, Jumpers W1 to W4
should be removed.
The baseband input of the evaluation board may also be driven
with a single-ended voltage. In this case, a bias level is provided
to the unused input from Potentiometer R10 by installing either
W1 or W2.
Setting SW1 in Position B disables the ADL5390 output amplifier.
With SW1 set to Position A, the output amplifier is enabled. With
SW1 set to Position A, an external voltage signal, such as a pulse,
can be applied to the DSOP SMA connector to exercise the
output amplifier enable/disable function.
Rev. A | Page 19 of 23

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