IDT54FCT162244AT Ver la hoja de datos (PDF) - Integrated Device Technology
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IDT54FCT162244AT Datasheet PDF : 9 Pages
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IDT54/74FCT16244T/AT/CT/ET, 162244T/AT/CT/ET,
166244T/AT/CT, 162H244T/AT/CT/ET FAST CMOS 16-BIT BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
SWITCH POSITION
VIN
Pulse
Generator
V CC
D.U.T.
RT
VOUT
50pF
CL
7.0V
500Ω
500Ω
2544 drw 05
Test
Switch
Open Drain
Disable Low
Closed
Enable Low
All Other Tests
Open
DEFINITIONS:
2544 lnk 13
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
DATA
INPUT
tSU
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
tSU
ETC.
tH
tREM
tH
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
2544 drw 06
LOW-HIGH-LOW
PULSE
HIGH-LOW-HIGH
PULSE
1.5V
tW
1.5V
2544 drw 07
PROPAGATION DELAY
SAME PHASE
INPUT TRANSITION
tPLH
tPHL
OUTPUT
tPLH
tPHL
OPPOSITE PHASE
INPUT TRANSITION
ENABLE AND DISABLE TIMES
3V
1.5V
0V
VOH
1.5V
VOL
3V
1.5V
0V
2544 drw 08
ENABLE
DISABLE
CONTROL
INPUT
OUTPUT
NORMALLY
LOW
tPZL
SWITCH
CLOSED
tPZH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
3V
1.5V
0V
tPLZ
3.5V
3.5V
1.5V
tPHZ
0.3V VOL
1.5V
0.3V VOH
0V
0V
NOTES:
2544 drw 09
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
5.2
8
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