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DM9102D

Single Chip Fast Ethernet NIC Controller

Davicom Semiconductor, Inc. 

6.1.13 Power Management Control/Status (xxxxxx54H~PMCSR)

31

16 15 14

987

2 10

Reserved

R/W

Reserved

R/W

Reserved

R/W

PME_Status

PME_En

Power_State

Bit

31:16

15

14:9

8

7:2

1:0

Default

0000H

0

000000

1

000000

00

Type

RO

RW/C

RO

RW

RO

RW

Description

Reserved

PME_ Status

This bit is set when the function would normally assert the PME# signal

independent of the state of the PME_ En bit. Writing a “1” to this bit will clear it.

This bit defaults to “0” if the function does not support PME# generation from D3

(cold).If the function supports PME# from D3 (cold) then this bit is sticky and must

be explicitly cleared by the operating system whenever the operating system is

initially loaded.

Reserved

It means that the DM9102D does not support reporting power consumption.

PME_ En

Write “1” to enables the function to assert PME#, write “0” to disable PME#

assertion

This bit defaults to “0” if the function does not support PME# generation from D3

(cold)

If the function supports PME# from D3(cold) then this bit is sticky and must be

explicitly cleared by the operating system each time the operating system is

initially loaded.

Reserved

This two bits field is both used to determine the current power state of a function

and to set the function into a new power state. The definitions given below

00: D0

11: D3 (hot)

20

Final

Version: DM9102D-DS-F01

May 10, 2006

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