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BT869KRF Ver la hoja de datos (PDF) - Conexant Systems

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BT869KRF Datasheet PDF : 104 Pages
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Bt868/Bt869
Flicker-Free Video Encoder with UltrascaleTM Technology
1.0 Functional Description
1.3 Circuit Description
Table 1-6. Auto-Configuration Modes 47YCrCb Input (2 of 2)
Register Name
Mode 4
Mode 5
Mode 6
Mode 7
NTSC 640x480
PAL 640x480
NTSC 800x600
PAL 800x600
CLKO=28.195793 MHz CLKO=29.500008 MHz CLKO=38.769241 MHz CLKO=36.000000 MHz
DEC
HEX
DEC
HEX
DEC
HEX
DEC
HEX
YLPF [1:0]
V_SCALE [13:0]
PLL_FRACT [15:0]
EN_XCLK
BY_PLL
PLL_INT [5:0]
EN_SCART
ECLIP
PAL
DIS_SCRESET
VSYNC_DUR
625LINE
SETUP
NI_OUT
SYNC_AMP [7:0]
BST_AMP [7:0]
MCR [7:0]
MCB [7:0]
MY [7:0]
MSC [31:0]
3
3
3
3
3
3
3
3
5266
1492
4096
1000
7373
1CCD
5734
1666
34830
880E
7282
1C72
15124
3B14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12
C
13
D
17
11
16
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
1
1
0
0
0
0
0
0
0
0
1
1
0
0
1
1
0
0
0
0
1
1
0
0
1
1
1
1
0
0
1
1
0
0
0
0
0
0
0
0
0
0
229
E5
240
F0
229
E5
240
F0
118
76
88
58
116
74
87
57
121
79
129
81
119
77
128
80
68
44
73
49
67
43
72
48
133
85
140
8C
133
85
140
8C
545259520 20800000 645499916 26798C0C 396552378 17A2E8BA 528951320 1F872818
1.3.6 Clocking and Timing Generation
There are two timing generators that control the operation of the encoder. The
encoder timing block generates the signals for the proper encoding of the video
into NTSC or PAL, and extracts the processed input pixels from the internal
FIFO. The encoding timing generator can receive its clock from either an external
crystal oscillator and PLL, or from the CLKI pin. Normal operation requires that
the encoding clock be generated by the PLL. The clock source is selected by the
EN_XCLK register bit. If EN_XCLK is set to a logical 0, the internal clock
source is selected; and when the EN_OUT bit is set, the CLKO pin is enabled to
drive the derived clock.
A crystal must be present between XTALIN and XTALOUT pins if the
internal clock source is selected. The frequency of the CLK is synthesized by a
PLL such that the frequency is:
Fclk = Fxtal * {PLL_INT(5:0) + [PLL_FRACT(15:0)/216]}/6
100123B
Conexant
1-13

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