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LX1660

ADVANCED PWM CONTROLLER

Microsemi Corporation 

PRODUCT DATABOOK 1996/1997

ADVANCED PWM CONTROLLER

PR O D U C T I O N D ATA S H E E T

LX1660/1661

T H E O R Y O F O P E R A T I O N (continued)

ERROR VOLTAGE COMPARATOR

The error voltage comparator compares the feedback voltage at

the positive side of the sense resistor to the set voltage (set voltage

plus 40mV in LX1661). An external filter is recommended for high-

frequency noise.

CURRENT LIMIT AND HICCUP SECTIONS

Current limiting is performed by sensing the inductor current

across the sense resistor. Exceeding this threshold turns the

output drive OFF and latches it OFF until the PWM latch set input

goes high again. To reduce stress on the external MOSFET and

SCR during output shorts or heavy-load conditions, a hiccup

circuit is incorporated, which provides 10% duty cycle. The

hiccup time is programmed via a capacitor at the HICCUP pin. A

low voltage at this pin disables the hiccup function.

OFF TIME CONTROL TIMING SECTION

The timing capacitor C allows programming of the OFF-time. The

T

timing capacitor is quickly charged during the ON time of the top

MOSFET and allowed to discharge when the top MOSFET is OFF.

OFF TIME CONTROL TIMING SECTION (continued)

In order to minimize frequency variations while providing

different supply voltages, the discharge current is modulated by

the voltage at the OTADJ pin. The OFF-time is inversely propor-

tional to the OT voltage. If the OT voltage drops below 0.7V,

ADJ

ADJ

the IC shuts down into a low quiescent current mode.

UNDER VOLTAGE LOCKOUT AND SHUTDOWN SECTION

The purpose of the UVLO is to keep the output drive off and to

maintain low quiescent current until the input voltage reaches the

start-up threshold. At voltages below the start-up voltage, the

UVLO comparator disables the internal biasing, and turns off the

output drives. The NINV pin is pulled low.

SYNCHRONOUS CONTROL SECTION

The synchronous control section incorporates a unique break-

before-make function to ensure that the primary switch and the

synchronous switch are not turned on at the same time. Approxi-

mately 100 nanoseconds of deadtime is provided by the break-

before-make circuitry to protect the MOSFET switches.

APPLICATION INFORMATION

12V

See Note 1

Fuse (F1)

is optional

F1

VIN 5V

VOUT = VREF * (1 + R14/R15)

(VREF = 2.0V)

R14

1.3k (See Table 5)

R15

2.0k

R16

10k

R3, 1k

R4

1k

C4

390pF

C3

0.1µF

C7

0.1µF

C8

680pF

LX1660

1 EN

2 OTADJ

3 SGND

VC1 16

TDRV 15

PGND 14

4 VREF

5 INV

6 NINV

BDRV 13

VCC 12

SYNCEN 11

7 HICCUP

CS+ 10

8 CT

CS- 9

16-pin SOIC

C2 x 3

6.3V, 1500µF

Sanyo MV-GX

or equivalent

Q1

IRL3103

C9

L1

1µF

5µH Toroid

D1

See Note 4

R1, 5m

VOUT 3.3V

See Note 2

C5 x 6

6.3V, 1500µF

Sanyo MV-GX or

equivalent

C1 R5, 1k

390pF

R6, 1k

See Note 3

Notes

1. The number of capacitors within this bank may be reduced for cost savings at a penalty of increased ripple on the input bus.

2. The number of capacitors in the output filter bank may be reduced by two in a typical application; more may be removed for systems

with lesser transient requirements.

3. If pulse-by-pulse current limiting is desired, remove C7 and short LX1660 pin 7 to ground.

4. D1 is Motorola MBR1035 for 10A capability; downsize as per required current.

Figure 4 — LX1660 Controller Used In A Typical Stand-Alone High-Current 5V To 3.3V Regulator Application

Copyright © 1998

Rev. 1.1 7/98

7

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