TMC22071A Ver la hoja de datos (PDF) - Cadeka Microcircuits LLC.
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TMC22071A Datasheet PDF : 24 Pages
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TMC22071A
PRODUCT SPECIFICATION
Pin Assignments (continued)
80
81
51
50
100
1
31
30
Notes:
1. NC = Do Not Connect.
* These pins are not connected in the
TMC22071A. However, you should
connect these pins as shown for
compatibility with future genlock ICs.
Pin Name
1 A0
2 NC
3 NC
4 R/W
5 CS
6 VDD
7 RESET
8 DGND
9 D0
10 NC
11 NC
12 NC
13 NC
14 NC
15 NC
16* DGND
17 INT
18 VDD
19 NC
20 NC
21 CVBS0
22 CVBS1
23 CVBS2
24 CVBS3
25 CVBS4
Pin Name
26 VDD
27 DGND
28 CVBS5
29 CVBS6
30 CVBS7
31 NC
32 GHSYNC
33 GVSYNC
34 VALID
35 NC
36 NC
37 NC
38 DGND
39 DGND
40 LDV
41* DGND
42* VDD
43 NC
44 VDD
45 PXCK
46 DGND
47 DGND
48 VDD
49 VDDA
50 AGND
Pin Name
51 VDDA
52 VDDA
53 NC
54 NC
55 AGND
56 NC
57 RB
58 VIN3
59 NC
60 VDDA
61 VIN2
62 NC
63 AGND
64 VDDA
65 VIN1
66 NC
67 AGND
68 RT
69 AGND
70 VREF
71 NC
72 AGND
73 VDDA
74 AGND
75 CBYP
Pin Name
76 NC
77 PFD IN
78 NC
79 NC
80 NC
81 AGND
82 DDS OUT
83 NC
84 NC
85 NC
86 PXCK SEL
87 VDDA
88 COMP
89 AGND
90 DGND
91 CLK IN
92 VDD
93 CLK OUT
94 EXT PXCK
95 DGND
96 DGND
97 DGND
98 VDD
99 NC
100 VDD
65-22071-02B
Pin Definitions
Pin Number
68 pin 100 pin
Pin Name PLCC MQFP
Video Input
VIN1-3
34, 31, 65, 61,
29
58
Clocks
CLK IN
51
91
CLK OUT 53
93
PXCK
LDV
19
45
17
40
EXT PXCK 54
94
PXCK SEL 46
86
Pin Type
1.23Vp-p
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
Function
Composite Video Input. Video inputs,1.25 Volts peak-to-peak, sync
tip to peak color
20 MHz DDS clock input. 20 MHz CMOS clock input to DDS. This
pin may also be used along with CLK OUT for directly connecting
crystals.
Inverted clock output. Inverted DDS clock output. This pin may also
be used along with CLK IN for directly connecting a crystal.
2x Pixel clock output. 2x oversampled line-locked clock output.
Pixel clock output. Delayed pixel clock output. LDV runs at 1/2 the
rate of PXCK and its rising edge is useful for transferring CVBS
digital video from the TMC22071A to the TMC22x9x Digital Video
Encoders.
External PXCK input. Input for external PXCK clock source.
PXCK source select. Select input for internal or external PXCK.
When HIGH, the internally generated line-locked PXCK is selected.
When LOW, the external PXCK source is enabled.
4
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