GS842Z18AB-166 Ver la hoja de datos (PDF) - Giga Semiconductor

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GS842Z18AB-166

4Mb Pipelined and Flow Through Synchronous NBT SRAMs

Giga Semiconductor 

GS842Z18/36A Pin Description

Symbol

A0, A1

An

DQA

DQB

DQC

DQD

BA, BB, BC, BD

CK

CKE

W

E1

G

ADV

ZZ

FT

LBO

Type

I

I

I/O

I

I

I

I

I

I

I

I

I

I

I

ZQ

I

NC

—

TMS

I

TDI

I

TDO

O

TCK

I

VDD

I

VSS

I

VDDQ

I

CK

I

GS842Z18/36AB-180/166/150/100

Description

Address field LSBs and Address Counter Preset Inputs

Address Inputs

Data Input and Output pins

Byte Write Enable for DQA, DQB, DQC, DQA I/Os; active low ( x36 Version)

Clock Input Signal; active high

Clock Input Buffer Enable; active low

Write Enable. Writes all enabled bytes; active low

Chip Enable; active low

Chip Enable; active high

Output Enable; active low

Burst address counter advance enable; active high

Sleep Mode control; active high

Flow Through or Pipeline mode; active low

Linear Burst Order mode; active low

FLXDrive Output Impedance Control

(Low = Low Impedance [High Drive], High = High Impedance [Low Drive])

No Connect

Scan Test Mode Select

Scan Test Data In

Scan Test Data Out

Scan Test Clock

Core power supply

I/O and Core Ground

Output driver power supply

Clock Input Signal; active high

Rev: 1.03 11/2004

4/30

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

© 2001, GSI Technology

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