GS880Z18AT-133 Ver la hoja de datos (PDF) - Unspecified
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GS880Z18AT-133 Datasheet PDF : 25 Pages
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100-Pin TQFP Pin Descriptions
Symbol
Type
A0, A1
In
A2–A17
In
A18
In
CK
In
BA
In
BB
In
BC
In
BD
In
W
In
E1
In
E2
In
E3
In
G
In
ADV
In
CKE
In
NC
—
DQA1–DQA9
I/O
DQB1–DQB9
I/O
DQC1–DQC9
I/O
DQD1–DQD9
I/O
ZZ
In
FT
In
LBO
In
VDD
In
VSS
In
VDDQ
In
GS880Z18/36AT-250/225/200/166/150/133
Description
Burst Address Inputs; Preload the burst counter
Address Inputs
Address Input (x18 Version Only)
Clock Input Signal
Byte Write signal for data inputs DQA1–DQA9; active low
Byte Write signal for data inputs DQB1–DQB9; active low
Byte Write signal for data inputs DQC1–DQC9; active low
Byte Write signal for data inputs DQD1–DQD9; active low
Write Enable; active low
Chip Enable; active low
Chip Enable; Active High. For self decoded depth expansion
Chip Enable; Active Low. For self decoded depth expansion
Output Enable; active low
Advance/Load; Burst address counter control pin
Clock Input Buffer Enable; active low
No Connect
Byte A Data Input and Output pins
Byte B Data Input and Output pins
Byte C Data Input and Output pins
Byte D Data Input and Output pins
Power down control; active high
Pipeline/Flow Through Mode Control; active low
Linear Burst Order; active low
Core power supply
Ground
Output driver power supply
Rev: 1.02 9/2002
4/25
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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