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BT8110
Conexant
Conexant Systems Conexant
BT8110 Datasheet PDF : 84 Pages
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Bt8110/8110B
High-Capacity ADPCM Processor
2.0 Functional Description
2.1 Overview
2.1.1 Clocking and Synchronization
Each operating mode of the Bt8110/8110B requires clock and synchronization
inputs to allow proper operation. If the microprocessor mode is used, then the
synchronization signal frequency can be any submultiple of a PCM frame
(8 kHz). If the hardware mode is used, then the synchronization frequency can be
any submultiple of 1/32 of the clock frequency; in this case the synchronization
signal is used to identify consecutive inputs and outputs.
The CLOCK signal must operate at a frequency of 8.192 MHz to obtain the
8 kHz frame rate for PCM signals. This clock can be gapped and may have a peak
rate of 16.5 MHz (maximum rate of 16.384 MHz is used in the E1 transcoder
application).
The SYNC signal must operate at a submultiple of the 8 kHz frame rate. The
SYNC signal is active on the falling edge; the rising edge can occur anywhere in
the frame. (In direct framer interface mode, the SYNC signal is active on the
rising edge.) The SYNC signal synchronizes internal modulo-32 counters and an
internal word counter. Its falling edge synchronizes the counters, and this can
occur at any submultiple of 8 kHz.
ADPCM_STB and PCM_STB are output timing signals that can be used to
enable three-state inputs to the parallel input bus and to clock the parallel output
bus signals. They are each low for two clock cycles. The rising edge of each
signal can be used to clock the parallel output data into an octal register.
2.1.2 Microprocessor Interface
An integral control interface to an Intel 8051-family microprocessor, Motorola
68HC11-family, or equivalent is provided. This microprocessor interface allows
the operation mode and the per-channel configuration of the Bt8110/8110B to be
selected directly from a software-based system. The use of this interface is
optional; it is enabled by setting the MICREN control input high. When MICREN
is set high, all mode and per-channel configuration is done through the
microprocessor. The microprocessor being used should be connected as shown in
Table 2-1.
The microprocessor interface to the Bt8110/8110B consists of 11 pins: µP
enable (MICREN) address latch enable (ALE), write enable (WR*), chip select
(CS), and seven multiplexed address/data bits (AD[6:0]). These signals are
connected as shown in Table 2-1.
The microprocessor interface is designed to allow the direct connection of an
Intel 8051-family or Motorola 68HC11 microprocessor. The chip select input can
be taken from one of the address inputs or from an address decoding circuit to
locate the Bt8110/8110B within any desired memory address range. The chip
select input to the Bt8110/8110B allows the control of multiple circuits from a
single microprocessor.
The microprocessor interface is write-only. Data read from the address space
of the Bt8110/8110B will be invalid.
100060C
Conexant
2-3

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