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A42U0616 Datasheet PDF : 25 Pages
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A42U0616 Series
Preliminary
1M X 16 CMOS DYNAMIC RAM WITH EDO PAGE MODE
Features
n Organization: 1,048,576 words X 16 bits
n Part Identification
- A42U0616 (1K Ref.)
n Single 2.5V power supply/built-in VBB generator
n Low power consumption
- Operating: 120mA (-50 max)
- Standby: 1mA (TTL), 0.2mA (CMOS),
250µA (Self-refresh current)
n High speed
- 50/60/80 ns RAS access time
- 25/30/40 ns column address access time
General Description
The A42U0616 is a new generation randomly accessed
memory for graphics, organized in a 1,048,576 -word by
16-bit configuration. This product can execute Write and
Read operation via CAS pin.
The A42U0616 offers an accelerated Fast Page Mode
cycle with a feature called Extended Data Out (EDO).
Pin Configuration
n SOJ
n TSOP
VCC
1
I/O0
2
I/O1
3
I/O2
4
I/O3
5
VCC
6
I/O4
7
I/O5
8
I/O6
9
I/O7
10
NC
11
NC
12
WE
13
RAS
14
NC
15
NC
16
A0
17
A1
18
A2
19
A3
20
VCC
21
42
VSS
41
I/O15
40
I/O14
39
I/O13
38
I/O12
37
VSS
36
I/O11
35
I/O10
34
I/O9
33
I/O8
32
NC
31
LCAS
30
UCAS
29
OE
28
A9
27
A8
26
A7
25
A6
24
A5
23
A4
22
VSS
VCC
1
I/O0
2
I/O1
3
I/O2
4
I/O3
5
VCC
6
I/O4
7
I/O5
8
I/O6
9
I/O7
10
NC
11
NC
12
NC
13
WE
14
RAS
15
NC
16
NC
17
A0
18
A1
19
A2
20
A3
21
VCC
22
44
VSS
43
I/O15
42
I/O14
41
I/O13
40
I/O12
39
VSS
38
I/O11
37
I/O10
36
I/O9
35
I/O8
34
NC
33
NC
32
LCAS
31
UCAS
30
OE
29
A9
28
A8
27
A7
26
A6
25
A5
24
A4
23
VSS
- 13/15/20 ns CAS access time
- 20/25/35 ns EDO Page Mode Cycle Time
n Separate CAS ( UCAS , LCAS ) for byte selection
n Fast Page Mode with Extended Data Out
n Read-modify-write, RAS -only, CAS -before- RAS ,
Hidden refresh capability
n TTL-compatible, three-state I/O
n JEDEC standard packages
- 400mil, 42-pin SOJ
- 400mil, 50/44 TSOP type II package
This allow random access of up to 1024(1K Ref.) words
within a row at a 50/40/28 MHz EDO cycle, making the
A42U0616 ideally suited for graphics, digital signal
processing and high performance computing systems.
Pin Descriptions
Symbol
A0 - A9
I/O0 - I/O15
RAS
LCAS
UCAS
WE
OE
VCC
VSS
NC
Description
Address Inputs (1K product)
Data Input/Output
Row Address Strobe
Column Address Strobe for Lower Byte
(I/O0 – I/O7)
Column Address Strobe for Upper Byte
(I/O8 – I/O15)
Write Enable
Output Enable
2.5V Power Supply
Ground
No Connection
PRELIMINARY (June, 2001, Version 0.0)
1
AMIC Technology, Inc.
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