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IDT7027L(2018) Ver la hoja de datos (PDF) - Integrated Device Technology

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IDT7027L
(Rev.:2018)
IDT
Integrated Device Technology IDT
IDT7027L Datasheet PDF : 20 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
IDT7027S/L
High-Speed 32K x 16 Dual-Port Static RAM
Industrial and Commercial Temperature Ranges
Truth Table I – Chip Enable
CE
CE0
CE1
Mode
VIL
VIH
Port Selected (TTL Active)
L
< 0.2V
>VCC - 0.2V
Port Selected (CMOS Active)
VIH
X
Port Deselected (TTL Inactive)
X
H
>VCC - 0.2V
VIL
Port Deselected (TTL Inactive)
X
Port Deselected (CMOS Inactive)
X
<0.2V
Port Deselected (CMOS Inactive)
NOTES:
1. Chip Enable references are shown above with the actual CE0 and CE1 levels, CE is a reference only.
2. Port "A" and "B" references are located where CE is used.
3. "H" = VIH and "L" = VIL.
3199 tbl 02
Truth Table II – Non-Contention Read/Write Control
Inputs(1)
Outputs
CE(2)
R/W
OE
UB
LB
SEM
I/O8-15
I/O0-7
Mode
H
X
X
X
X
H
High-Z
High-Z Deselected: Power-Down
X
X
X
H
H
H
High-Z
High-Z Both Bytes Deselected
L
L
X
L
H
H
DATAIN
High-Z Write to Upper Byte Only
L
L
X
H
L
H
High-Z
DATAIN Write to Lower Byte Only
L
L
X
L
L
H
DATAIN
DATAIN Write to Both Bytes
L
H
L
L
H
H
DATAOUT High-Z Read Upper Byte Only
L
H
L
H
L
H
High-Z DATAOUT Read Lower Byte Only
L
H
L
L
L
H
DATAOUT DATAOUT Read Both Bytes
X
X
H
X
X
X
High-Z
High-Z Outputs Disabled
NOTES:
1. A0L — A14L A0R — A14R.
2. Refer to Chip Enable Truth Table.
3199 tbl 03
Truth Table III – Semaphore Read/Write Control
Inputs(1)
Outputs
CE(2)
R/W
OE
UB
LB
SEM
I/O8-15
I/O0-7
Mode
H
H
L
X
X
L
DATAOUT DATAOUT Read Data in Semaphore Flag
X
H
L
H
H
L
DATAOUT DATAOUT Read Data in Semaphore Flag
H
X
X
X
L
DATAIN
DATAIN Write I/O0 into Semaphore Flag
X
X
H
H
L
DATAIN
DATAIN Write I/O0 into Semaphore Flag
L
X
X
L
X
L
______
______
Not Allowed
L
X
X
X
L
L
______
______
Not Allowed
NOTES:
1. There are eight semaphore flags written to via I/O0 and read from all the I/Os (I/O0 __I/O15). These eight semaphore flags are addressed by A0-A2.
2. Refer to Chip Enable Truth Table.
3199 tbl 04
6.442

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