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82093AA

I/O ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (IOAPIC)

Intel 

E

82093AA (IOAPIC)

Bit

Description

10:8

Delivery Mode (DELMOD)—R/W. The Delivery Mode is a 3 bit field that specifies how the

APICs listed in the destination field should act upon reception of this signal. Note that certain

Delivery Modes only operate as intended when used in conjunction with a specific trigger Mode.

These restrictions are indicated in the following table for each Delivery Mode.

Bits

[10:8] Mode

Description

000 Fixed

001 Lowest

Priority

Deliver the signal on the INTR signal of all processor cores listed in the

destination. Trigger Mode for "fixed" Delivery Mode can be edge or level.

Deliver the signal on the INTR signal of the processor core that is

executing at the lowest priority among all the processors listed in the

specified destination. Trigger Mode for "lowest priority". Delivery Mode

can be edge or level.

010 SMI

System Management Interrupt. A delivery mode equal to SMI requires an

edge trigger mode. The vector information is ignored but must be

programmed to all zeroes for future compatibility.

011 Reserved

100 NMI

Deliver the signal on the NMI signal of all processor cores listed in the

destination. Vector information is ignored. NMI is treated as an edge

triggered interrupt, even if it is programmed as a level triggered interrupt.

For proper operation, this redirection table entry must be programmed to

“edge” triggered interrupt.

101 INIT

Deliver the signal to all processor cores listed in the destination by

asserting the INIT signal. All addressed local APICs will assume their

INIT state. INIT is always treated as an edge triggered interrupt, even if

programmed otherwise. For proper operation, this redirection table entry

must be programmed to “edge” triggered interrupt.

110 Reserved

111 ExtINT

Deliver the signal to the INTR signal of all processor cores listed in the

destination as an interrupt that originated in an externally connected

(8259A-compatible) interrupt controller. The INTA cycle that corresponds

to this ExtINT delivery is routed to the external controller that is expected

to supply the vector. A Delivery Mode of "ExtINT" requires an edge

trigger mode.

7:0

Interrupt Vector (INTVEC)—R/W: The vector field is an 8 bit field containing the interrupt

vector for this interrupt. Vector values range from 10h to FEh.

PRELIMINARY

13

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