IMIC9835CY Ver la hoja de datos (PDF) - Cypress Semiconductor
Número de pieza
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Lista de partido
IMIC9835CY
Cypress Semiconductor
IMIC9835CY Datasheet PDF : 18 Pages
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C9835
AC Parameters
Parameter
Description
133 MHz Host
Min. Max.
100 MHz Host
Min. Max.
66 MHz Host
Min. Max.
Units
CPU
TPeriod
THIGH
TLOW
Tr / Tf
TSKEW
TCCJ
CPU(0:2) period[25,26]
CPU(0:2) high time[30]
CPU(0:2) low time[31]
CPU(0:2) rise and fall times[27]
CPU0 to any CPU Skew[26,29]
CPU(0:2) Cycle to Cycle Jitter[26,29]
7.5
8.0
10.0 10.5 15.0 15.5
ns
1.87
3.0
5.2
ns
1.67
2.8
5.0
ns
0.4
1.6
0.4
1.6
0.4
1.6
ns
150
150
150
ps
250
250
250
ps
SDRAM
TPeriod
SDRAM(0:5) 100 MHz and DCLK
period[25,26]
10.0 10.5 10.0 10.5 10.0 10.5
ns
THIGH
SDRAM(0:5) 100 MHz and DCLK high
time[30]
3.0
3.0
3.0
ns
TLOW
SDRAM(0:5) 100 MHz and DCLK low
time[31]
2.8
2.8
2.8
ns
Tr / Tf
SDRAM(0:5) 100 MHz and DCLK rise and
fall times[27]
0.4
1.6
0.4
1.6
0.4
1.6
ns
TSKEW
SDRAM(0:5) 100 MHzand DCLK
Skew[26,29]
250
250
250
ps
TCCJ
SDRAM(0:5) 100 MHz, DCLK Cycle to
Cycle Jitter[26,29]
250
250
250
ps
IOAPIC
TPeriod
IOAPIC(0,1) period[25,26]
30.0
30.0
30.0
ns
THIGH
IOAPIC(0,1) high time[30]
12.0
12.0
12.0
ns
TLOW
IOAPIC(0,1) low time[31]
12.0
12.0
N/S
12.0
ns
Tr / Tf
IOAPIC(0,1) rise and fall times[27]
0.4
1.6
0.4
1.6
0.4
1.6
ns
TSKEW IOAPIC(0,1) Skew[26,29]
250
250
250
ps
TCCJ
IOAPIC(0,1) Cycle to Cycle Jitter[26,29]
500
500
500
ps
3V66
TPeriod
THIGH
TLOW
Tr / Tf
TSKEW
TCCJ
3V66-(0:2) period[25,26]
3V66-(0:2) high time[30]
3V66-(0:2) low time[31]
3V66-(0:2) rise and fall times[28]
(Any 3V66) to (any 3V66) Skew[26,29]
3V66-(0:2) Cycle to Cycle Jitter[26,29]
15.0 16.0 15.0 16.0 15.0 16.0
ns
5.25
5.25
5.25
ns
5.05
5.05
5.05
ns
0.5
2.0
0.5
2.0
0.5
2.0
ns
175
175
175
ps
500
500
500
ps
PCI_F
TPeriod
THIGH
PCI(_F,1:6) period[25,26]
PCI(_F, 1:6) high time[30]
30.0
30.0
30.0
ns
12.0
12.0
12.0
ns
Notes:
25. This parameter is measured as an average over 1us duration, with a crystal center frequency of 14.31818 MHz.
26. All outputs loaded per Table 6. Probes are placed on the pins and taken at 1.5V levels for 3.3V signals and at 1.25V for 2.5V signals (see Figure 8).
27. Probes are placed on the pins, and measurements are acquired between 0.4V and 2.4V for 3.3V signals and between 0.4V and 2.0V for 2.5V signals (see
Figure 8).
28. Measured from when both SEL1 and SEL0 are switched to high (enable).
29. This measurement is applicable with Spread ON or Spread OFF.
30. Probes are placed on the pins, and measurements are acquired at 2.4V for 3.3V signals and at 2.0V for 2.5V signals (see Figure 8).
31. Probes are placed on the pins, and measurements are acquired at 0.4V.
Document #: 38-07303 Rev. **
Page 12 of 18
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