1.6
Functional Block Diagram
PSB 7280
SIO AD( 0:7) A(0 :3 ) R D# WR# C S# AL E
INTR# IN T#
Re se t
EA#
Parallel Host Inter face
Mon, C/I
Con trol
SC L K
SR
ST
R FS
TFS
S er i al
A u di o
Audio
C h a nn e ls
HDL C/
Dat a
Cha n n el s
DD
IOM/
DU
PCM
I/F
D CL
MMa ai lbilob xo x
F SC
2 25656b yb tyete
Conf ig/Cont rol
Regis t ers
Tim ers
DSP
Core
RAM ROM
External Memory Inter face
BRG
clock
g en/
PL L
C M1
C L KO
XTA L1
XTA L2
C A(0 :15 ) C D(0 :15 ) C RD# CWR# C PS# C DS#
Figure 3
Detailed description see Chapter 2.
Semiconductor Group
17
Data Sheet 1998-07-01