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RT9259A

12V Synchronous Buck PWM DC-DC and Linear Power Controller

Richtek Technology 

Functional Pin Description

BOOT (Pin 1)

Bootstrap supply for the upper gate driver. Connect the

bootstrap capacitor between BOOT pin and the PHASE

pin. The bootstrap capacitor provides the charge to turn on

the upper MOSFET.

RT_DIS (Pin 2)

Connect a resistor from RT_DIS to GND to set frequency.

In addition, if this pin is pulled down towards GND, it will

disable both regulator outputs until released.

COMP (Pin 3)

Buck converter external compensation. This pin is used

to compensate the control loop of the buck converter.

FB (Pin 4)

Buck converter feedback voltage. This pin is the inverting

input of the PWM error amplifier. FB senses the switcher

output through an external resistor divider network.

DRV (Pin 5)

Connect this pin to the gate of an external MOSFET. This

pin provides the drive for the linear regulator’ s pass

MOSFET.

FBL (Pin 6)

Linear regulator feedback voltage. This pin is the inverting

input of the LDO error amplifier and protection monitor.

Connect this pin to an external resistor divider network of

the linear regulator.

GND (Pin 7)

Signal ground for the IC. All voltages levels are measured

with respect to this pin.

VCC12 (Pin 8)

Connect this pin to a well-decoupled 12V bias supply. It is

also the positive supply for the lower gate driver, LGATE.

RT9259A

VREF (Pin 9)

0.8V reference voltage output.

OCSET (Pin 10)

Connecting a resistor (ROCSET) from this pin to the source

of the upper MOSFET and the drain of the lower MOSFET

sets the over-current trip point. ROCSET, an internal 40μA

current source, and the lower MOSFET on resistance,

RDS(ON), set the converter over-current trip point (IOCSET)

according to the following Equation :

40uA × ROCSET − 0.4V

IOCSET =

R DS(ON) of the lower MOSFET

LGATE (Pin 11)

Lower gate driver output. Connect to the gate of the low-

side power N-Channel MOSFET. This pin is monitored by

the adaptive shoot-through protection circuitry to determine

when the lower MOSFET has turn off.

PGND (Pin 12)

Power ground return for the lower gate driver.

PHASE (Pin 13)

Connect this pin to the source of the upper MOSFET and

the drain of the lower MOSFET. This pin is monitored by

the adaptive shoot-through protection circuitry to determine

when the upper MOSFET has turned off.

UGATE (Pin 14)

Upper gate driver output. Connect to gate of the high-side

power N-Channel MOSFET. This pin is monitored by the

adaptive shoot-through protection circuitry to determine

when the upper MOSFET has turned off.

DS9259A-02 March 2007

www.richtek.com

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