UP6204 Ver la hoja de datos (PDF) - Unspecified

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UP6204

Compact Three-Phase Synchronous-Rectified Buck Controller

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Preliminary

uP6204

Functional Pin Description

No. Pin Name Pin Function

1/35/30

BOOT1/2/3

Bootstrap Supply for the floating upper gate drivers of channel 1/2/3 respectively. Connect

the bootstrap capacitor CBOOT between BOOT1/2/3 pin and the PHASE1/2/3 pin to form

bootstrap circuits. The bootstrap capacitor provides the charge to turn on the upper

MOSFET. Typical values for CBOOT range from 0.47uF to 1uF. Ensure that CBOOT is placed

near the IC.

Upper Gate Driver Output for Channel 1/2/3. Connect these pins to the gates of

2/34/29 UGATE1/2/3 corresponding upper MOSFET. These pins are monitored by the adaptive shoot-through

protection circuitry to determine when the corresponding upper MOSFET has turned off.

3

POK

Power OK Indication. This is an open-drain output for power OK indication. This pin is

set to high impedance after soft start end and no fault occurs.

4

SCL Serial Clock Input. This pin receives serial bus clock signal.

5

SDA Serial Data Input. This pin is input or output of serial bus data signal.

Chip Enable and High Temperature Warning Output. Pulling this pin to GND shuts

6

VRHOT/EN

down the uP6204. All gate drivers output low to turn off both upper and lower MOSFETs.

This pin is clamped at 0.45V when the output voltage is within regulation and set to high

impedance when the output voltage is during soft start or out of regulation.

7/8

VID1/0 Digital Inputs 1/0 for Power Play. See the related sections for detail.

9

RT

Operation Frequency Setting. Connect a resistor between this pin and GND to set the

operation frequency.

10/11/

12/13

R3/R2/

R1/R4

Reference Voltage Inputs for Power Play. Connect voltage dividers from 5VCC to these

pins to ground to set the reference voltages for power play. The FB pin voltage is regulated

to these voltages when selected by VID0 and VID1. See the related sections for detail.

14/15/16

ISEN1/2/3

Phase Current Sening Input 1/2/3. These pins sense the phase current by sensing the

voltage drop across the respecti ve lower MOSFET. C onnect these pi ns to the

corresponding PHASE node through an external resistor. See the related sections for

details.

17

CSN

Negative Input for Total Current Sensing. This pin along with CSN pin senses the total

inductor current. See the related sections for details.

18

CSP

Positive Input for Total Current Sensing. This pin along with CSP pin senses the total

inductor current. See the related sections for details.

19

FBRTN

Return Path for Remote Voltage Sensing. Connect this pin directly to the ground node

where the output voltage is to be regulated.

Feedback Voltage. This pin is the inverting input to the error amplifier. Connect this pin

20

FB

directly to the node where the output voltage is to be regulated. Use this pin in combination

with the COMP pin to compensate the voltage control feedback loop of the converter.

Error Amplifier Output. This is the output of the error amplifier (EA) and the non-inverting

21

COMP input of the PWM comparators. Use this pin in combination with the FB pin to compensate

the voltage-control feedback loop of the converter.

Phase Reduction Threshlold Setting. Connect a resistor from this pin to GND to set the

22

PSI

phase reduction threshold level. Pull this pin lower than 0.2V to disable the phase reduction

function.

uPI Semiconductor Corp., http://www.upi-semi.com

3

Rev. P01, File Name: uP6204-DS-P01000

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