RTL8208BF Ver la hoja de datos (PDF) - Realtek Semiconductor

Número de pieza

componentes Descripción

Lista de partido

RTL8208BF

SINGLE-CHIP OCTAL 10/100BASE-TX/FX PHY TRANSCEIVER

Realtek Semiconductor 

RTL8208B-LF/RTL8208BF-LF

Datasheet

5.5. SMI (Serial Management Interface)

Pin Name

MDIO

MDC

Table 6. SMI (Serial Management Interface)

Pin

Type Description

111

I/O, Management Data I/O. Bi-directional data interface. A 1.5KΩ pull-

(Pu) up resistor is required (as specified in IEEE802.3u).

The MAC controller access of the MII registers should be delayed at

least 700µs after completion of the reset because of the internal reset

operation of the RTL8208B(F)-LF.

Pin driver capacity = 8mA.

112 I, (Pd) Management Data Clock. 0 to 2.5MHz clock sourced by MAC to

sample MDIO.

The MAC controller access of the MII registers should be delayed at

least 700µs after completion of the reset because of the internal reset

operation of the RTL8208B(F)-LF.

5.6. LED Pins

Pin Name

SCAN_LED[7:0]

SCAN_STATUS[2:0]

LED_CLK/SCAN_

STATUS[0]

LED_DATA/SCAN_

STATUS[1]

Pin

41, 42, 43,

44, 45, 48,

49, 50

114, 115,

116

Table 7. LED Pins

Type Description

O In scan LED mode, SCAN_LED[7:0] is the Scan LED port enable.

(Pu) See section 7.9 LED Configuration, page 38.

All pins driver capacity = 8mA.

O In scan LED mode, SCAN_STATUS[2:0] outputs (Col/Fulldup,

(Pu) Link/Act, Spd) for each port.

In serial LED mode, SCAN_STATUS[0] is used as LED_CLK,

which outputs the reference clock for the serial LED signals.

In serial LED mode, SCAN_STATUS[1] is used as LED_DATA,

which outputs serial status bits that can be shifted into a shift register

to be displayed via LEDs. LED_DATA is output synchronously to

LED_CLK.

All pins driver capacity = 8mA.

Single-Chip Octal 10/100-TX/FX PHY Transceiver

9

Track ID: JATR-1076-21 Rev. 1.3

Share Link: