74VCX32373 Ver la hoja de datos (PDF) - Fairchild Semiconductor
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74VCX32373
Fairchild Semiconductor
74VCX32373 Datasheet PDF : 8 Pages
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Connection Diagram
Pin Assignment for FBGA
(Top Thru View)
Truth Tables
Inputs
LE1
OE1
I0–I7
X
H
X
H
L
L
H
L
H
L
L
X
Inputs
LE2
OE2
I8–I15
X
H
X
H
L
L
H
L
H
L
L
X
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial (HIGH or LOW, inputs may not float)
Outputs
O0–O7
Z
L
H
O0
Outputs
O8–O15
Z
L
H
O0
Preliminary
Pin Descriptions
Pin Names
Description
OEn
LEn
I0–I31
O0–O31
Output Enable Input (Active LOW)
Latch Enable Input
Inputs
Outputs
FBGA Pin Assignments
1
2
3
4
5
6
A
O1
O0 OE1 LE1
I0
I1
B
O3
O2 GND GND I2
I3
C
O5
O4
VCC VCC
I4
I5
D
O7
O6 GND GND I6
I7
E
O9
O8 GND GND I8
I9
F
O11
O10 VCC VCC
I10
I11
G
O13 O12 GND GND I12
I13
H
O14 O15 OE2 LE2
I15
I14
J
O17 O16 OE3 LE3
I16
I17
K
O19 O18 GND GND I18
I19
L
O21
O20 VCC VCC
I20
I21
M
O23 O22 GND GND I22
I23
N
O25 O24 GND GND I24
I25
P
O27
O26 VCC VCC
I26
I27
R
O29 O28 GND GND I28
I29
T
O30 O31 OE4 LE4
I31
I30
Inputs
LE3
OE3
I16–I23
X
H
X
H
L
L
H
L
H
L
L
X
Inputs
LE4
OE4
I24–I31
X
H
X
H
L
L
H
L
H
L
L
X
Z = High Impedance
O0 = Previous O0 before HIGH-to-LOW of Latch Enable
Outputs
O16–O23
Z
L
H
O0
Outputs
O24–O31
Z
L
H
O0
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