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IDT72511

PARALLEL BIDIRECTIONAL FIFO 512 x 18 & 1024 x 18

Integrated Device Technology 

IDT72511/IDT72521

BIDIRECTIONAL FIRST-IN FIRST-OUT MEMORY

B→A READ BYPASS

R/WA

MILITARY AND COMMERCIAL TEMPERATURE RANGES

taS

taH

DSA

DA0–DA7,

DA16

RB (or DSB)

t aLZ

tBYA

taDV

(1)

BYTE 0 BYTE 1

taHZ

tBYD

tBYD

BYTE 2

(R/WB)

DB0–DB8

t BYD

BYTE 0

tBYD

(1)

BYTE 1

NOTES:

1. Once the bypass mode starts, any data change on Port B bus (Byte 0→Byte 1) will be passed to Port A bus.

2. WB = 1

tBYD

BYTE 2

A→B WRITE BYPASS

R/WA

DSA

DA0–DA7,

DA16

WB (or DSB)

taS

tBYD

(1)

BYTE 0

tBYD

BYTE 1

taH

BYTE 2

tBYD

tBYD

(R/WB)

DB0–DB8

tb BYDV

taBYDV

t bLZ

(1)

BYTE 0 BYTE 1

BYTE 2

tBYA

tbHZ

NOTES:

1. Once the bypass mode starts, any data change on Port A bus (Byte 0→Byte 1) will be passed to Port B bus.

2. RB = 1

Figure 16. Bypass Path Timing, BiFIFO Must Be in Peripheral Interface Mode

5.32

tBYD

2668 drw 17

23

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