IDT72511 Ver la hoja de datos (PDF) - Integrated Device Technology

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IDT72511

PARALLEL BIDIRECTIONAL FIFO 512 x 18 & 1024 x 18

Integrated Device Technology 

IDT72511/IDT72521

BIDIRECTIONAL FIRST-IN FIRST-OUT MEMORY

MILITARY AND COMMERCIAL TEMPERATURE RANGES

DSA

WB

(or R/WB = 0, DSB)

Write

1

B→A Empty

Flag

B→A Almost-

Empty Flag

2

t WEF

n+1

tWAEF

NOTES:

1. B→A FIFO is initially empty.

2. Assume the flag pins are programmed active LOW.

3. R/WA = 1.

Read

1

2

n+1

tREF

tRAEF

2668 drw 21

Figure 20. Empty and Almost-Empty Flag Timing for B→A FIFO, (n = programmed offset)

DSA

WB

(or R/WB=1,

)

(2)

B→A Almost-

Full Flag

(2)

B→A

Full Flag

Write

1

2

t WEF

tWFF

m+1

Read

1

NOTES:

1. B→A FIFO initially contains D – (M + 1) data words. D = 512 for IDT72511; D = 1024 for IDT72521.

2. Assume the flag pins are programmed active LOW.

3. R/WA = 1.

2

m+1

tRAFF

tRFF

2668 drw 22

Figure 21. Full and Almost-Full Flag Timing for B→A FIFO, (m = programmed offset)

5.32

26

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