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PI74FCT2841T Ver la hoja de datos (PDF) - Pericom Semiconductor

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Lista de partido
PI74FCT2841T
Pericom-Semiconductor
Pericom Semiconductor Pericom-Semiconductor
PI74FCT2841T Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
PI74FCT841T/843T/845T
(25Ω SERIES) P174FCT2841T
(25PI7S4eFrCieTs)8P41I7T4/F84C3TT2/884451TT BUS INTERFACE LATCHES 1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
Product Features:
Fast CMOS
Bus Interface Latches
• PI74FCT841/843/845/2841T is pin compatible with bipolar
FAST™ Series at a higher speed and lower power
consumption
• 25series resistor on all outputs (FCT2XXX only)
• TTL input and output levels
• Low ground bounce outputs
• Extremely low static power
• Hysteresis on all inputs
• Industrial operating temperature range: –40°C to +85°C
• Packages available:
– 24-pin 300 mil wide plastic DIP (P)
– 24-pin 150 mil wide plastic QSOP (Q)
– 24-pin 150 mil wide plastic TQSOP (R)
– 24-pin 300 mil wide plastic SOIC (S)
Product Description:
Pericom Semiconductor’s PI74FCT series of logic circuits are
produced in the Company’s advanced 0.8 micron CMOS
technology, achieving industry leading speed grades. All
PI74FCT2XXX devices have a built-in 25-ohm series resistor on
all outputs to reduce noise because of reflections, thus eliminating
the need for an external terminating resistor.
The PI74FCT841T/843T/845T and P174FCT2841T series are
buffered interface latches. These transparent latches designed with
3-state outputs and are designed to eliminate the extra packages
required to buffer existing latches and provide extra data width for
wider address/data paths or buses carrying parity. When Latch
Enable (LE) is HIGH, the flip-flops appear transparent to the data.
The data that meets the set-up time when LE is LOW is latched.
When OE is HIGH, the bus output is in the high impedance state.
The PI74FCT841/2841T is a 10-bit latch, the PI74FCT843T is a
9-bit latch, and the PI74FCT845T is an 8-bit latch.
PI74FCT841/843/845/2842T Logic Block Diagram
PRE
CLR
D0
D1
D2
D3
D4
D5
DN–1
DN
DP
LE Q
CLR
DP
LE Q
CLR
DP
LE Q
CLR
DP
LE Q
CLR
DP
LE Q
CLR
DP
LE Q
CLR
DP
LE Q
CLR
DP
LE Q
CLR
LE
OE
Y0
Y1
Y2
Y3
Y4
Y5
YN–1
YN
1
PS2025A 03/11/96

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